Accellera Systems Initiative Honors Shalom Bresticker with First Distinguished Service Award

Mr. Bresticker will be honored during DVCon U.S. 2024 for his significant contributions to Accellera standards

Elk Grove, Calif., February 27, 2024 -- Accellera Systems Initiative (Accellera) announced today that Shalom Bresticker, a longtime friend and contributor to Accellera standards efforts, is honored with the first Distinguished Service Award. The award will be presented during the Accellera-sponsored luncheon at DVCon U.S. 2024 on March 4.

Mr. Bresticker has been an electronics engineer for 30 years and more recently a technical editor for nearly a decade. He is currently helping to document Accellera’s UVM-MS standard. He recently completed documentation for Accellera’s Portable Stimulus standard and the IEEE’s Std 1800-2023 SystemVerilog Language Reference Manual. He was awarded the Accellera Technical Excellence Award in 2010 for his contributions to the Verilog, SystemVerilog, Verilog-AMS and OVL standards.

“Shalom has been an invaluable contributor to the development of Accellera standards,” stated Lu Dai, Accellera Chair. “His breadth of knowledge and expertise dissecting the crucial elements so that they are clear is incredibly beneficial to users of the standards. He painstakingly reviews hundreds of pages, fixing errors along the way. We have benefited from his skills for years and are grateful for his contributions to Accellera. We are thrilled to bestow Accellera’s first Distinguished Service Award to Shalom.”

“I am honored to receive this prestigious award from Accellera,” commented Mr. Bresticker, “I have been privileged to work together for many years with wonderful and talented people to contribute to society through the development of EDA standards used by people all over the world.”

Mr. Bresticker was the technical editor for the 2005 IEEE Verilog standard, the 2017 and 2023 IEEE SystemVerilog standards, and the Accellera Portable Stimulus 1.0a, 2.0, and 2.1 standards. He has been an active member of the IEEE P802.4, P1364, and P1800 standards committees and the Accellera Portable Stimulus Working Group. He also participated in the IEEE P1364.1 standards committee and the Accellera OVL and Verilog-AMS working groups. Mr. Bresticker was awarded the Technical Committee Award at the 2008 SNUG Boston conference.

He was awarded a Lady Davis Fellowship to attend Technion-Israel Institute of Technology, where he received his master’s degree in electrical engineering. Mr. Bresticker’s bachelor’s degree in electrical engineering and computer science is from Princeton University.

For more information on the Accellera luncheon at DVCon U.S., visit the Accellera at DVCon U.S. webpage.

About Accellera Systems Initiative
Accellera Systems Initiative is an independent, not-for profit organization dedicated to create, support, promote and advance system-level design, modeling and verification standards for use by the worldwide electronics industry. The organization accelerates standards development and, as part of its ongoing partnership with the IEEE, its standards are contributed to the IEEE Standards Association for formal standardization and ongoing change control. For more information, please visit Find out more about membership. Follow @accellera on Twitter or to comment, please use #accellera. Accellera Global Sponsors are Cadence, Siemens EDA, and Synopsys.


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