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Copyright© 1996-2000 by Open Verilog International, Inc. All rights reserved.
No part of this work covered by the copyright hereon may be reproduced or used in any form or by any means -graphic, electronic, or mechanical, including photocopying, recording, taping, or information storage and retrieval systems - without the prior written approval of Open Verilog International.
Additional copies of this manual may be purchased by contacting Open Verilog International at the address shown below.
The information contained in this draft manual represents the definition of the Verilog-AMS hardware description language as proposed by OVI (Analog and Mixed-Signal TSC) as of February, 2000. Open Verilog International makes no warranties whatsoever with respect to the completeness, accuracy, or applicability of the information in this draft manual to a user's requirements.
Open Verilog International reserves the right to make changes to the Verilog-AMS hardware description language and this manual at any time without notice.
Open Verilog International does not endorse any particular simulator or other CAE tool that is based on the
Verilog-AMS hardware description language.
Suggestions for improvements to the Verilog hardware description language and/or to this manual are welcome. They should be sent to the address below.
Information about Open Verilog International and membership enrollment can be obtained by inquiring at the address below.
Published as: Verilog-AMS Language Reference Manual
Published by: Open Verilog International
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The following people contributed to the creation, editing, and review of this document.
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