To support, promote and advance system-level design, modeling and verification standards for use by the worldwide electronics industry, Accellera hosts and supports numerous events throughout the year.

Portable Stimulus Webinar Series

We are excited to announce a three-part webinar series on Portable Stimulus beginning Monday, April 10th, followed by sessions Monday, April 17th and Monday, April 24th. 

Portability of reusable test cases has long been a goal for semiconductor verification and validation teams. No one wants to "reinvent the wheel" by having to rewrite similar tests again and again. The upcoming Accellera Portable Test and Stimulus (PSS) standard will permit the creation of a reusable model for a variety of users across different levels of integration under different configurations. This model will enable the generation of different test implementations for multiple execution platforms, including IP simulation, full system-on-chip (SoC) simulation, emulation, FPGA prototyping and silicon. With such a standard in place, EDA vendors can produce tools that automatically generate stimulus, results checks and coverage metrics tuned for a particular target platform. 

This webinar series is derived from the Accellera Portable Stimulus Tutorial presented at DVCon U.S. in February 2017. Accellera is proud to be able to share this important presentation with the wider EDA, ASIC and FPGA verification communities. After each presentation, there will be a Q&A period where webinar presenters will answer questions from attendees. 

Part 1: Monday, April 10 at 8:00am PT

Portable Stimulus: The Next Leap in Verification & Validation Productivity and Introducing Portable Stimulus Concepts & Constructs

This session will begin with a discussion of verification productivity, the reasons the Portable Stimulus Standard was undertaken and the goals of the standardization effort. It will also provide a detailed technical overview of many of the concepts and language constructs being used to enable portable scenario-level specification of stimulus and verification intent. This webinar will last approximately 1 hour, including Q&A.

Part 1 of the webinar is completed; this session is now available on demand.

Part 2: Monday, April 17 at 8:00am PT

Building System-Level Scenarios and Generating Tests from Portable Stimulus

This session will build on the previous discussion in Part 1 of concepts and constructs, showing how block-level stimulus and verification intent models can be reused and augmented to describe system-level scenarios. It will also discuss how a Portable Stimulus model may be used to generate a test implementation on multiple platforms. This webinar will last approximately 1 hour, including Q&A.

Part 2 of the webinar is completed; this session is now available on demand.

Part 3: Monday, April 24 at 8:00am PT

Coverage in Portable Stimulus, The Hardware/Software Interface Library, and What’s Next for Portable Stimulus

This session will discuss how to model coverage in PSS and how a hardware/software interface layer could be used to improve portability of stimulus models. It will close with a summary of standardization efforts and upcoming goals. This webinar will last approximately 1 hour, including Q&A.

Register for Part 3 >

DVCon China 2017DVCon China

April 19, 2017
Parkyard Hotel Shanghai
Shanghai, China

Registration open | Advance rates until April 7

Accellera Taiwan Forum for System Level Verification & Design

April 21, 2017
9:00am - 5:30pm
Ambassador Hotel
Hsinchu, Taiwan

Details and registration >
Space is limited, so register soon. No on-site registration.

The 2016 movie "Passengers" portrays a future of space travel. Sleeping in a dormant state for 120 years, the crew and passengers journey through the universe relying on a spacecraft entirely controlled by artificial intelligence. One can barely imagine the scale of effort in design and verification that would need to be conducted before such machines could ever be trusted by humans. Obviously today we see only the slim light of dawn of the massive applications of AI. We are already getting a glimpse into the near future with the Tesla autopilot vehicles and the AlphaGo’s winning streaks over human masters. As such, the Accellera Taiwan Forum for System Level Verification & Design looks into technologies flourishing in the past five years that have pushed the success of multiple-core SoC and are now pushing the progress of the IoT, fog computing and edge computing. The Forum covers the latest topics and methodologies in verification, system level design and portable stimulus developed and standardized by Accellera. The Forum is to be held on April 21st 2017 at Ambassador Hotel Hsinchu, Taiwan.

Alan P. Su, PhD
Adjunct Associate Professor
EE Dept., NCKU

DVCon India 2017DVCon India

September 14-15, 2017
The Leela Palace
Bangalore, India

Call for abstracts >

DVCon Europe 2017DVCon Europe

October 16-17, 2017
Munich, Germany

Call for papers >

2017 Global Sponsors

CadenceMentor GraphicsSynopsys

Become a sponsor. Sponsorship of events provides many benefits including awareness and targeted lead generation. Interested in becoming a Global Sponsor for 2017? View our Sponsorship Package. If you would like information on sponsoring an event or becoming a global sponsor, please contact us.

Presentations from Past Events

Presentations from past events are available for download.