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0002953
 
Algorithmic generation of covergroup bin contents
[SystemVerilog P1800] SV-EC - 2012-02-12 01:04
0004039
 
run_phase.is_after(reset_phase) returns true
[VIP] Phasing - 2012-02-10 09:00
0004038
 
minor ripple effect of 3793
[Power Aware P1801] 6.37 set_design_attributes - 2012-02-10 07:51
0004037
A
Define false vacuity and contributions to pass/fail counters in simulation
[SystemVerilog P1800] SV-AC - 2012-02-09 20:45
0004036
inconsistent and partially incorrect illegality
[Power Aware P1801] 6.42 set_level_shifter - 2012-02-09 15:30
0004035
problem with the interface of a domain
[Power Aware P1801] 6.40 set_isolation - 2012-02-09 15:18
0004034
 
Typo in userguide example for set_inst_override_by_type
[VIP] UsersGuide - 2012-02-09 12:59
0004033
 
Tickling a future-phase objection causes the in-phase raising of that objection to be ignored
[VIP] Phasing - 2012-02-08 10:29
0004032
 
Not possible to undo a factory override.
[VIP] BCL - 2012-02-08 05:12
0004031
 
uvm_pack_* macros ignore endianness
[VIP] BCL - 2012-02-07 12:14
Resolved [^] (1 - 10 / 80)
0002857
AKA 2857a: Clarify meaning of -transitive FALSE, -transitive TRUE on find_objects
[Power Aware P1801] 7.01 find_objects - 2012-02-10 06:41
0002849
Clarify that whenever a supply net ref is required, the supply net handle can be used
[Power Aware P1801] 4.03.1 Explicit connection of supply nets - 2012-02-10 06:41
0002604
AKA 2604a: Request to add scope to set_power_switch
[Power Aware P1801] 6.46 set_power_switch - 2012-02-10 06:41
0004006
UPF Command Return Value specifications are inconsistent and not necessarily useful
[Power Aware P1801] 6.05 Error handling - 2012-02-10 06:41
0003986
UPF Command Return Value specifications are inconsistent and not necessarily useful
[Power Aware P1801] 6.05 Error handling - 2012-02-10 06:41
0003980
Deprecate -include_scope of create_power_domain
[Power Aware P1801] 6.19 create_power_domain - 2012-02-10 06:41
0003979
Deprecate -scope of create_power_domain
[Power Aware P1801] 6.19 create_power_domain - 2012-02-10 06:41
0003957
Change the name of Appendix B to reflect the fact that it contains Package UPF
[Power Aware P1801] Annex B Supply net logic type - 2012-02-10 06:41
0003955
Correct VHDL package UPF to avoid use of reserved word as a parameter name
[Power Aware P1801] Annex B Supply net logic type - 2012-02-10 06:41
0003947
What is the utility of add_domain_elements - should it be deprecated?
[Power Aware P1801] 6.06 add_domain_elements - 2012-02-10 06:41
Recently Modified [^] (1 - 10 / 3986)
0003033
 A
Enhance checker modeling capabilities
[SystemVerilog P1800] SV-AC - 2012-02-12 01:34
0002987
 A
Soft Constraints
[SystemVerilog P1800] SV-EC - 2012-02-12 01:15
0002949
A
LRM is silent about the semantics of referencing a clocking block output
[SystemVerilog P1800] SV-EC - 2012-02-12 01:07
0002506
 A
Non-trivial coverage space shapes and joint conditions are difficult to specify with covergroups
[SystemVerilog P1800] SV-EC - 2012-02-12 01:05
0002953
 
Algorithmic generation of covergroup bin contents
[SystemVerilog P1800] SV-EC - 2012-02-12 01:04
0002093
 A
Checker construct should permit output arguments
[SystemVerilog P1800] SV-AC - 2012-02-12 00:58
0001523
A
How is ?: defined for non-integral data types?
[SystemVerilog P1800] SV-BC - 2012-02-12 00:53
0001356
 A
Multiple inheritance
[SystemVerilog P1800] SV-EC - 2012-02-12 00:28
0003990
 
Extend connect_supply_set (or rather associate_supply_set) to take a list of supply_set_refs which are to be connected.
[Power Aware P1801] 6.14 connect_supply_set - 2012-02-10 09:55
0004039
 
run_phase.is_after(reset_phase) returns true
[VIP] Phasing - 2012-02-10 09:00

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