The RASSP Digest - Vol. 2, 2nd. Qtr. 1995
Advanced Technology Laboratories' Path to 4x Improvements
by Jeff Pridmore
To provide 4X improvements in time-to-market, life-cycle cost, and design quality, Lockheed Martin's Martin Marietta Laboratories is uniquely combining the three elements of the RASSP technology triad -- methodology, Model Year Architecture, and design environment -- into an integrated, rapid prototyping environment.
1. Problem
Today's military designs are the product of a long, serial design cycle that has limited ability to respond to changing requirements and technology. Current practice surveys -- as detailed by V.K. Madisetti in the last issue of the RASSP Digest -- indicate that today's developments require anywhere from 37 to 73 months. Commercial processor technology offers significant capability upgrades every two to three years, yet typical military development/deployment cycles are more than five years. The result-technology in the fielded system is one to two generations behind the state-of-the-art at the time of deployment.
Technology obsolescence is further exacerbated over the life cycle of the system. The platform life cycle for military systems is often more than twenty five years, and the DoD focus is on further extending life cycles. Systems can thus be upgraded 8-10 times over their operational lifetime, with about half of these required to meet new operational requirements.
2. The RASSP Approach
RASSP's Model-Year concept strives to fundamentally change the design process from a custom-oriented, serial design approach, shown in in the left side of Figure 1, to the iterative, simulation-based approach, shown on the right side of the figure. The result is a series of virtual prototypes (fully simulated design implementations) that can be built quickly for insertion into products as new developments or upgrades.
The virtual prototype is developed as an evolving executable specification, which is a form of information model composed of:
- Functional and performance simulation models
- Testbenches
- Requirements -- size, weight, power, cost, etc.
- Process description -- previous and upcoming steps in the design process along with engineering notes, lessons learned, etc.
Lockheed Martin evaluated existing practices and defined the changes required to implement a 4X improvement. Figure 2 shows the schedule for an actual 48-month radar upgrade program, with the time required for concept development, architecture trade-offs, detailed design, manufacturing, and integration and test. Note that the schedule also includes a 10-month redesign cycle for unanticipated reworks that occur due to either design errors or functional updates uncovered during integration and test. The second set of schedule elements shows the improvements RASSP must provide to accomplish 4X. Evaluation of the figure indicates several key points. Under RASSP, a higher percentage (about 1/3 of the 14.5 months) of the overall development cycle is spent during concept design and trade-offs than in current practice (about 1/4 of the 58 months). Less time (1/4 of the 14.5 months) is spent in redesign, integration and test for RASSP than for pre-RASSP approaches (41% of the 58 months).
In all cases, RASSP promises to provide signifcant cycle time improvements -- but what are the elements that lead to this payoff? First, the only way to achieve 4X is to eliminate redesign and drastically reduce the integration and test time for systems. Simply improving design efficiency will not achieve 4X; the design portion of the process only accounts for 50 percent of the total task. Second, detailed design and manufacturing times must be reduced to further lower cost and shrink schedules.
Providing the gains described in Figure 2 requires:
- Implementing concurrent design practices using integrated hierarchical design verification to improve design quality and performance.
- Maximizing reuse of both hardware and software elements to dramatically decrease cycle time.
- Improving productivity enables rapid implementation of the steps that lead to improved quality, such as hardware/software codesign and virtual prototyping.
Lockheed Martin is quantifying the time-to-market and life-cycle cost impact of these elements by developing a parametric model of the RASSP process using the PRICE cost estimation tool. We have modeled a typical airborne radar example for both current practice and the projected RASSP process. While this work is still ongoing, sensitivity analyses using the tool emphasized the above conclusions. Our simulations show that reuse will probably account for more than half the projected improvements. The second major factor is productivity, which enables many of the quality elements described above, and which can also supply up to a factor of 2X. We are still introducing new RASSP concepts into the model, such as the effects of virtual prototyping (enabling first-pass success) on schedule and cost, and the impact of the Model-Year upgrade approach on the long-term life-cycle support costs. Our studies in these areas will further quantify the impacts of the technology developments and provide a more robust model of the RASSP process. A robust model of this type is very important to help potential users project the improvements in time-to-market and life-cycle cost they can expect out of RASSP -- not all projects will be able to realize 4X. Factors that affect improvements include availability of models to support virtual prototyping, the amount of reuse applicable to the project, and domain-specific elements that dictate specific approaches.
3. RASSP Technology Enablers
The three major impact areas -- quality, reuse, and productivity -- are closely linked to the RASSP technology triad, as shown in Table 1. All of Lockheed Martin's ongoing technology in this article; several key developments highlighted in the table are summarized in the following paragraphs for each area of the technology triad.
We expect several key elements of the RASSP Methodology that depart from current practice to be large contributors to the 4X improvements:
- Processes to support design efficiency and reuse, including application of object-oriented analysis and design techniques, and maximum use of reuse libraries
- Maximizing use of concurrent engineering, including the concept of Integrated Product Development Teams; we emphasize methods to enhance both concurrency and collaboration between tasks throughout the design cycle
- Applying the spiral development model to signal processor design, providing a risk-driven, iterative approach to rapidly developing prototypes
- Creating a new architecture process that implements hardware/software codesign to hierarchically design and verify the signal processor hardware and software design throughout the design cycle. The result is a fully operational virtual prototype before manufacturing release.
In conjunction with Methodology, the RASSP Model Year Architecture is a framework for hardware and software re-use. It provides the design guidelines and constraints for implementing signal processors to support efficient upgrades using modular building blocks. Lessons learned from early programs in software reuse showed that placing elements in a library does not create an environment that supports reuse; the approach must be an integrated, fundamental part of the overall design process. The Lockheed Martin Model Year Architecture provides resources and constraints to the design process and enforces a structured approach that implements scalable, modular hardware and software processing elements in a functional architecture. An instantiation of the functional architecture results in a set of encapsulated library elements. Encapsulation refers to structure added to otherwise "raw" library elements to support the functional architecture framework and ensure library element interoperability and upgradability.
The Model Year Architecture also provides a set of design guidelines and constraints for general architectural development, such as how to properly use the functional architecture framework, general use of encapsulated libraries, and most importantly, procedures to encapsulate new library components. These design guidelines and constraints are incorporated into the RASSP design methodology.
The RASSP approach to implementing the Model Year Architecture is based on modular, scalable architectures that use functional standard interfaces. By standardizing on functional interfaces, we can maximize independence from technology (electrical versus optical) and specific hardware versus software (processor-based versus dedicated hardware). We are using this approach to define several Standard Virtual Interfaces that define functional VHDL encapsulation wrappers, which enable modules to be seamlessly interconnected with minimal performance impact.
The RASSP Enterprise System provides the overall infrastructure to support Integrated Product Development Team interaction. The Design Environment provides the tools to implement end-to-end virtual prototyping. The enterprise system is the framework for effective integration of the software tools and models used to develop and manufacture RASSP products. The elements of the enterprise system that most contribute to 4X improvements are the Design Methodology Manger (DMM) and Product Data Management capabilities.
The DMM guides users through the process, providing access to the appropriate tools at the proper times, ensuring that complete data packages are generated and that all critical steps in the process are followed. This capability will greatly improve the quality of designs to ensure first-pass design success. Seamless tool access throughout the design process is also provided. DMM triggers the appropriate elements within the Product Data Management System to ensure that data automatically transitions between workflow steps in the proper format. By abstracting engineers from the details of the tool interaction and data management, large productivity gains can be realized and error-prone manual data translations eliminated.
The Design Environment strives to provide a seamless set of end-to-end tools to support hardware/software codesign and full design verification before manufacture via virtual prototypes. The tools being extended on the RASSP program that we expect to have the largest impact are those that support hardware/software codesign, and these include architecture trade-off, architecture-level design verification, and automated software generation tools.
The architecture selection tools enable users to select and size a processor architecture based on processor requirements generated during the subsystem design phase. Users first partition the functionality between hardware and software, and then verify top-level functionality using algorithm-level tools, such as Matlab, SPW or PGSE and evaluate the overall timeline performance using tools such as JRS's Netsyn. Other important factors, such as size, weight, power, cost, reliability, etc., are also included in the trade-offs at this level through a tool suite integrated into an architecture design advisor.
Once users have selected a candidate architecture, it is verified using the architecture verification tools, as shown in Figure 3. This tool suite consists of a set of performance and functional simulators at various levels of design abstraction (abstract behavior, ISA-level, Register Transfer Level, etc.) and models of computation (data flow, control flow, event driven, etc.) that are iteratively invoked by users to hierarchically verify the processor design before detailed implementation. Emulation and hardware testbed capabilities will also be integrated into the capability by combining simulation backplane and mixed-level domain (Ptolemy kernel) technology. We have already demonstrated early results of these capabilities on RASSP.
Automated software development is tightly coupled into the RASSP architecture process as graphs, implemented using the Navy's Processing Graph Methodology specification, to specify the algorithm and control functionality of the system. This enables users to start, stop, and initialize graphs, set graph parameters, and start and stop I/O procedures. User can specify top-level command programs to a large extent using state-based tools. RASSP is implementing a set of autocode generation tools that will enable users to take PGM graphs and automatically generate downloadable code for embedded multiprocessor environments. These tools implement the Model Year Architecture by using the reusable software libraries and targeting the code generation to support the Model-Year application programming interface (API) and run-time system (RTS).
4. Summary/Conclusions
The Lockheed Martin RASSP team is providing fundamental technology improvements via the RASSP technology triad to enable 4X improvements in design-cycle time, quality, and life-cycle cost reduction. We are demonstrating initial implementation of our reuse-based methodology implemented in an enterprise-wide system that supports distributed, collaborative interaction. We expect the Model-Year paradigm to be able to demonstrate 4X improvements over today's custom-based design approaches well before the end of the program. While the performance improvements across a wide range of programs will vary based upon the application, type of development, and availability of models, large improvements are already being demonstrated for ongoing programs.
The RASSP Digest - Vol. 2, 2nd. Qtr. 1995
95q2/news_3.html