ELECTRONIC DESIGN PROCESSES (EDP) 2010 SYMPOSIUM WORKSHOP
MONTEREY BEACH HOTEL, MONTEREY, CALIFORNIA
The Electronic Design Processes (EDP) Symposium Workshop,
now in its 17th year, fosters
the free exchange of ideas among the top thinkers, movers, and shakers
who focus on how chips and systems are designed in the electronics
industry. It provides a forum for this cross-section of the Design community to
discuss state-of-the-art improvements to electronics design processes and CAD
methodologies, rather than on the functions of the individual tools
themselves.
The Workshop, which takes place each year in Monterey, California,
emphasized both the here and now and the future. Attendees of this elite
workshop have met each year since 1993. It has attracted some of the most
far-seeing people in electronics as speakers.
If you need to know where the industry is and where it's going with
respect to the design and development, and especially methodologies and
technology of design, you should consider attending this coming year.
Please visit http://www.eda.org/edps to
see the list of past EDP Workshop speakers and presentations:
2009,
2008,
2007,
2006,
2005,
2004,
2003,
2002,
2001,
2000.
Use the following search tool to help lookup things in the past workshops
by pasting in http://www.eda.org/edps
THEMES IN 2010: 3D ICs, Cloud Computing, Multi-Processors and More (than Moore)
We solicited papers and proposals for special/panel sessions that
shed light on the methodologies used for real current and
future chip and system designs.
Topics included but were not limited to:
A printable version of the EDPS 2010 Workshop Call For Papers (CFP) is here:
http://www.eda.org/edps/edp2010/edp2010-cfp.pdf
The following is news that has been posted on the internet about this upcoming
EDPS 2010 Symposium:
- Grant Martin Blog: http://www.chipdesignmag.com/martins/2010/01/24/electronic-design-process-symposium-2010-edition/
- Steve Liebson's blog:
"http://www.edn.com/blog/980000298/post/320052232.html"
- Gabe Moretti:
http://www.gabeoneda.com/news/go-meet-leading-edge-edps
- Karen Bartelson's blog:
http://synopsysoc.org/thestandardsgame/?p=566
Any other such articles will be included here as they become
available.
PAPER SUBMISSION
Authors should submit full-length, original and unpublished papers (maximum 20 pages in single-column double spaced format, or 6 pages in double-column conference proceedings format) along with author contact information. Proposals for special and panel sessions may also be submitted; a 1-page description along with organizer contact information is required. Send Proposals via email to: edps@eda.org to the attention of the Program Committee.
IMPORTANT DATES
Submission Deadline: February 26, 2010.
Acceptance Date:Acceptance Notification:March 12, 2010
Camera-Ready Copy Date:Camera Ready Copy: March 26, 2010 On-site Registration:April 8, 2010
REGISTRATION
Workshop Registration:
The early registration deadline is March 1st.
Early registration is $275/$345/$100/$200 for IEEE members,
non-members, students, and IEEE Life Members, respectively.
If you are unemployed, we invite you to register using
a special $100 fee.
After march 1st, registration is $330, $415, $100, $295, respectively.
Registration includes a copy of the workshop notes, continental breakfast on both days, lunch both days, and the EDP banquet dinner.
You may bring a guest to the Banquet Dinner for $50.00.
If you do, please pay when you first check into the meeting.
Be sure to register before March 1 in order to get the discount registration rate!
PAYPAL REGISTRATION POINTERRegister online for the Workshop by clicking here:
http://www.eda.org/edps/WorkshopRegistration.html
HOTEL REGISTRATION
Hotel Reservations:
Please make hotel reservations with the Monterey Beach Resort (1-800-242-8627) directly. Space at the hotel is limited, and rooms must be reserved by March 1, 2010 to guarantee space and the reduced rate. If you want to fax a reservation request to the hotel, use this IEEE hotel reservaton form.
-->| April 8, 2010 | ||
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Check-ins and On-site Registration 8:30-9:00am |
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Day 1: Session1: Morning Keynote Speaker (9-10am) |
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|---|---|---|
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Moderator Dwight Hill Synopsys |
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T. W. Williams | Future Technology |
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Session 2:
ESL and other EDA trends 10am-Noon |
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| Moderator John Swan | ||
|
Igor Markov U Mich |
Do we need robust CAD tools? |
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Rajesh Gupta UCSD |
Another Look at High-Level Design
for Productivity Enhancements |
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Deming Chen U of Illnois |
Challenges and Opportunities of ESL Design Methodology |
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Kiron Pai Intel |
Data Management Challenges of CPU Design |
| Lunch Break | ||
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Session 3: Noon Keynote Speaker (12-1:30pm) |
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| Moderator Naresh Sehgal | ||
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David Stanasolovich Intel |
Keynote: Doing More with Less Abstract |
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Session 4:
HPC and Multi-cores for EDA (1:30pm-3:30pm) |
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| Moderator Neeraj Kaul | ||
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Ananth Sankaranarayanan
Intel |
High Performance Computing for Silicon Design |
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Patrick Madden SUNY Binghamton CSD |
Dealing with Serial Bottlenecks
in Multi-Core Systems |
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Patrick Groeneveld Magma |
Parallel EDA |
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Tom Spyrou Cadence |
Porting Legacy Applications
to Multicore |
| TEA Break (4pm) | ||
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Session 5:
Moving to a Brave New World (4:30 - 5:30pm) |
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| Moderator Harry Gries | ||
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James Colgan Xuropa |
Cloud Computing |
| - | Shameen Akhter Intel |
Counting Cores: A Directed Path for 0s and 1s? |
| Dinner (7pm onwards) | ||
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Session 6:
After Dinner - A Seriously Fun Talk |
||
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Andreas Kuehlmann CDN |
EDA = Electronics Design Automation -
Are You Kidding Me? |
| April 9, 2010 | ||
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Day 2, Session 7:
Power and New Design Needs (9:00 - 11:00am) |
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| - |
Moderator Ed Sperling System-Level Design |
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| - | Biswabeep Chatterjee Intel |
Power |
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Stephen Olsen Mentor |
Power |
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Prapanna Tiwari Synopsys |
Power |
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Carl Sechen UT Dallas |
Design Flows for Optimal Power Designs |
| Break | ||
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Session 8:
Advanced Technologies (11:30 to 1:00pm) |
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| Moderator Richard Goering | 
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Tsu-Jae King Berkeley |
Micro-Relays |
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Cong Khieu| MEMS for RF |
|
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Rahul Deokar Cadence |
3D IC's |
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Sungkyu Lim Georgia Tech |
3D IC's 3D Circuit Design with Through-Silicon-Via: Challenges and Opportunities |
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Day 2: 1:00pm
Wrap-Up and Lunch |
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