Re: Proposal Rob_P1, => Rob_P2


Subject: Re: Proposal Rob_P1, => Rob_P2
From: David Bishop (dbishop@server.vhdl.org)
Date: Sun Oct 06 2002 - 06:21:59 PDT


This is a neat format! I will add this to our web pages
if nobody objects.

http://www.eda.org/vhdl-std-logic/proposals/proposals.txt
http://www.eda.org/vhdl-std-logic/proposals/

Rob Anderson wrote:

> > Actually, I would very much like to hear their direction.
> > The last post to their SIG (before the latest flurry of
> > e-mails) was Febuary 24th.
> >
>
> Here are their proposals,
>
> CP-001
> Proposed Uncomment xnor operators
>
> CP-002
> Proposed Add shift operators for vector types
>
> CP-003
> Proposed Add array/scalar logical operators
>
> CP-004
> Proposed Add capacitive drive strength
>
> CP-005
> Proposed Make vector result subtypes same as 1076 operators
>
> CP-006
> Proposed Add logical reduction operations/operators
>
> CP-007
> Proposed Provide text I/O package for standard logic
>
> CP-008
> Proposed Provide formatted I/O with selection of radix
>
> CP-009
> Proposed Provide 'image attribute
>
> We should have a hypertext list like that.
>
> Based on this, we should not put in the std_logic_[u]vector
> versions of logic reduction operators, text io, array/scalar logic
> operators. Or our package could conflict with theirs.

-- 
NAME:     David W. Bishop           INTERNET: dbishop@vhdl.org



This archive was generated by hypermail 2b28 : Sun Oct 06 2002 - 06:22:19 PDT