Subject: Re: Proposal Rob_P1
From: Rob Anderson (rob@reawebtech.com)
Date: Fri Oct 04 2002 - 09:58:14 PDT
Samba,
This is an IEEE standards forum, and your question is out
of the context of what we are doing.
Please don't mail arbitrary questions to the reflector.
--Rob
samba wrote:
> pls let me know where i will get VITAL memory models.....
>
> or send me links for developing VITAL memory models..
>
> Thanks in adavance..
>
> Rgrds,
> SAM
> ----- Original Message -----
> From: "Jim Lewis" <jim@synthworks.com>
> To: <rob@reawebtech.com>
> Cc: "Numeric_Std 1076.3" <vhdlsynth@eda.org>
> Sent: Friday, October 04, 2002 6:13 PM
> Subject: Proposal Rob_P1
>
>
>
>>Alex and group,
>>
>>
>>>Now what about these 1164 functions?
>>>
>>Rob, Does the below capture your intent?
>>
>><Rob_P1>
>>I propose that we move the following match functions
>>based on std_ulogic, std_logic_vector, std_ulogic_vector
>>to std_logic_1164 (which is also open for modification
>>right now).
>>
>> -- Id: M.1
>> function STD_MATCH (L, R: STD_ULOGIC) return BOOLEAN;
>>
>> -- Id: M.4
>> function STD_MATCH (L, R: STD_LOGIC_VECTOR) return BOOLEAN;
>>
>> -- Id: M.5
>> function STD_MATCH (L, R: STD_ULOGIC_VECTOR) return BOOLEAN;
>>
>></Rob_P1>
>>--
>>~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
>>Jim Lewis
>>Director of Training mailto:Jim@SynthWorks.com
>>SynthWorks Design Inc. http://www.SynthWorks.com
>>1-503-590-4787
>>
>>Expert VHDL Training for Hardware Design and Verification
>>~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
>>
>>
>
This archive was generated by hypermail 2b28 : Fri Oct 04 2002 - 09:57:19 PDT