Subject: 1076.3 additions
From: Rob Anderson (rob@reawebtech.com)
Date: Thu Sep 26 2002 - 13:42:42 PDT
Dave Bishop wrote:
>>Also, some good documentation on these packages would be nice.
>>Something
>>we can add to 1076.3 when the time comes.
>>There were also several functions which I used (that I have done
before in
>>several other ASIC/FPGA packages) which might be nice to add to 1076.3
"max", "min", and "find_one" (find the first "1" in a vector string) >>would
>>be useful.
These functions sound like good additions if they simplify
fphdl coding. Max and min are pretty simple:
function max(a,b:signed):signed;
function min(a,b:signed):signed;
I am thinking we will want more general "find" functions
because there are two directions to scan, and for negative
numbers the first '0' is significant. So, we could make several
functions or a few general ones, E.G.
function find_left(a:signed;bitval:std_logic):integer;
function find_right(a:signed;bitval:std_logic):integer;
These function names seem a bit awkward though, any ideas?
I'd like to reopen the proposal for
procedures in 1076.3:
------------------------------------------------
Another idea from vhdlsynth (Vallenga) was procedures so that the
carry/borrow bit could be expressed more naturally in the code,
E.G.
procedure addc(a,b: in signed; cin: in std_logic; y: out signed;
cf: out std_logic);
Procedures are more structural, and they would be helpful for those
vendors like Synopsys (designware), Xilinx (coregen). We did not
add them initially because the package was getting hard to manage,
but now we have a chance to rethink that. I think they would be
popular.
Procedures would mirror the functions, the operations are already
defined. They simply make it easier to put structural clues in
the code.
--Rob
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