IEEE P1164 Working Group - Change Proposal

ID:	  CP-006

Proposer: Jim Lewis <jim@SynthWorks.com>

Status:	  Proposed (1-Jun-2001)
	  Analyzed (17-Nov-2002)
	  Resolved (17-Feb-2003)

Summary:  Add logical reduction operations/operators

Detail:

I would like to see reduction operators added to the package.
If 200X is seriously going to add this to the language, I guess
it may be worth waiting.  However, as one who likes code clarity, I 
do not see the advantage of the language adding an operator.  

Consider if you use a reduction operator in an expression:

Is this more readable (not built in)
   Parity <= xorr (Data) and ParityEnable ;

or this (built in)
   Parity <= (xorr Data) and ParityEnable ;


Analysis:

	By Peter Ashenden <peter@ashenden.com.au>, 17-Nov-2002

	This proposal has come from a number of sources in addition to
	the above-named proposer.  Furthermore, the P1076.3 working
	group is proposing similar functions for the numeric_bit and
	numeric_std packages.  It would therefore be appropriate to
	include the proposed functions in std_logic_1164, in a manner
	compatible with numeric_std.

	Ultimately, similar functions for bit/bit_vector and
	boolean/boolean-vector operations should be included in the
	base VHDL standard, 1076.

	Changes to 1164-1993:

	Add the following function declarations to the package
	declaration after the vectorized overloaded logical operators:

    -------------------------------------------------------------------
    -- vector-reduction functions
    -------------------------------------------------------------------
    FUNCTION and_reduce  ( arg : std_logic_vector  ) RETURN std_ulogic;
    FUNCTION and_reduce  ( arg : std_ulogic_vector ) RETURN std_ulogic;
    FUNCTION nand_reduce ( arg : std_logic_vector  ) RETURN std_ulogic;
    FUNCTION nand_reduce ( arg : std_ulogic_vector ) RETURN std_ulogic;
    FUNCTION or_reduce   ( arg : std_logic_vector  ) RETURN std_ulogic;
    FUNCTION or_reduce   ( arg : std_ulogic_vector ) RETURN std_ulogic;
    FUNCTION nor_reduce  ( arg : std_logic_vector  ) RETURN std_ulogic;
    FUNCTION nor_reduce  ( arg : std_ulogic_vector ) RETURN std_ulogic;
    FUNCTION xor_reduce  ( arg : std_logic_vector  ) RETURN std_ulogic;
    FUNCTION xor_reduce  ( arg : std_ulogic_vector ) RETURN std_ulogic;
    FUNCTION xnor_reduce ( arg : std_logic_vector  ) RETURN std_ulogic;
    FUNCTION xnor_reduce ( arg : std_ulogic_vector ) RETURN std_ulogic;

	Add the following function bodies to the package body after
	the vectorized overloaded logical operators:

    -------------------------------------------------------------------
    -- vector-reduction functions
    -------------------------------------------------------------------

    -------------------------------------------------------------------
    -- and
    -------------------------------------------------------------------
    FUNCTION and_reduce  ( arg : std_logic_vector  ) RETURN std_ulogic IS
        VARIABLE result : std_ulogic := '1';
    BEGIN
        FOR i IN arg'RANGE LOOP
            result := and_table (result, arg(i));
        END LOOP;
        RETURN result;
    END and_reduce;
    -------------------------------------------------------------------
    FUNCTION and_reduce  ( arg : std_ulogic_vector ) RETURN std_ulogic IS
        VARIABLE result : std_ulogic := '1';
    BEGIN
        FOR i IN arg'RANGE LOOP
            result := and_table (result, arg(i));
        END LOOP;
        RETURN result;
    END and_reduce;

    -------------------------------------------------------------------
    -- nand
    -------------------------------------------------------------------
    FUNCTION nand_reduce ( arg : std_logic_vector  ) RETURN std_ulogic IS
        VARIABLE result : std_ulogic := '1';
    BEGIN
        FOR i IN arg'RANGE LOOP
            result := and_table (result, arg(i));
        END LOOP;
        RETURN not_table(result);
    END nand_reduce;
    -------------------------------------------------------------------
    FUNCTION nand_reduce ( arg : std_ulogic_vector ) RETURN std_ulogic IS
        VARIABLE result : std_ulogic := '1';
    BEGIN
        FOR i IN arg'RANGE LOOP
            result := and_table (result, arg(i));
        END LOOP;
        RETURN not_table(result);
    END nand_reduce;

    -------------------------------------------------------------------
    -- or
    -------------------------------------------------------------------
    FUNCTION or_reduce   ( arg : std_logic_vector  ) RETURN std_ulogic IS
        VARIABLE result : std_ulogic := '0';
    BEGIN
        FOR i IN arg'RANGE LOOP
            result := or_table (result, arg(i));
        END LOOP;
        RETURN result;
    END or_reduce;
    -------------------------------------------------------------------
    FUNCTION or_reduce   ( arg : std_ulogic_vector ) RETURN std_ulogic IS
        VARIABLE result : std_ulogic := '0';
    BEGIN
        FOR i IN arg'RANGE LOOP
            result := or_table (result, arg(i));
        END LOOP;
        RETURN result;
    END or_reduce;

    -------------------------------------------------------------------
    -- nor
    -------------------------------------------------------------------
    FUNCTION nor_reduce  ( arg : std_logic_vector  ) RETURN std_ulogic IS
        VARIABLE result : std_ulogic := '0';
    BEGIN
        FOR i IN arg'RANGE LOOP
            result := or_table (result, arg(i));
        END LOOP;
        RETURN not_table(result);
    END nor_reduce;
    -------------------------------------------------------------------
    FUNCTION nor_reduce  ( arg : std_ulogic_vector ) RETURN std_ulogic IS
        VARIABLE result : std_ulogic := '0';
    BEGIN
        FOR i IN arg'RANGE LOOP
            result := or_table (result, arg(i));
        END LOOP;
        RETURN not_table(result);
    END nor_reduce;

    -------------------------------------------------------------------
    -- xor
    -------------------------------------------------------------------
    FUNCTION xor_reduce  ( arg : std_logic_vector  ) RETURN std_ulogic IS
        VARIABLE result : std_ulogic := '0';
    BEGIN
        FOR i IN arg'RANGE LOOP
            result := xor_table (result, arg(i));
        END LOOP;
        RETURN result;
    END xor_reduce;
    -------------------------------------------------------------------
    FUNCTION xor_reduce  ( arg : std_ulogic_vector ) RETURN std_ulogic IS
        VARIABLE result : std_ulogic := '0';
    BEGIN
        FOR i IN arg'RANGE LOOP
            result := xor_table (result, arg(i));
        END LOOP;
        RETURN result;
    END xor_reduce;

    -------------------------------------------------------------------
    -- xnor
    -------------------------------------------------------------------
    FUNCTION xnor_reduce ( arg : std_logic_vector  ) RETURN std_ulogic IS
        VARIABLE result : std_ulogic := '0';
    BEGIN
        FOR i IN arg'RANGE LOOP
            result := xor_table (result, arg(i));
        END LOOP;
        RETURN not_table(result);
    END xnor_reduce;
    -------------------------------------------------------------------
    FUNCTION xnor_reduce ( arg : std_ulogic_vector ) RETURN std_ulogic IS
        VARIABLE result : std_ulogic := '0';
    BEGIN
        FOR i IN arg'RANGE LOOP
            result := xor_table (result, arg(i));
        END LOOP;
        RETURN not_table(result);
    END xnor_reduce;


Resolution:

  Analysis accepted

  Member votes: Accept 11 (85%)   Reject 2 (15%)   Abstain 0 (0%)
  All votes:    Accept 13 (87%)   Reject 2 (13%)   Abstain 0 (0%)

  From Lance Thompson

  I prefer the idea of waiting for 1076 to alter the specification of
  logical operator behavior.  However, if 1076 analysis rejects the
  notion of unary logical operators, I would be in favor of the
  analysis.  Reduction functions ARE very useful, I only worry about
  having redundant methods...

  From Steve Bailey  

  I think we need the unary reduction operands.  I think they should
  be added to 1076 first and then overloaded here.  I see no benefit
  in typing "xor_reduce" instead of xor.  Nor do I see a benefit in
  later having overloadable unary reduction operators in the language
  and then not overload them in 1164.

  My recommendation is that this group request the 200x group to
  quickly agree to adding the unary reduction operators so 1164 and
  1076.3 can exploit them immediately.  This would be a good test as
  to how quickly we can move things on the 200x side of things.  (I
  think having a short list of relatively straight-forward fast lane
  items is worth considering in 1076 200x.)