Subject: Approval for merger into P1076
From: Peter Ashenden (peter@ashenden.com.au)
Date: Fri Feb 20 2004 - 14:54:43 PST
Dear colleages,
You recall that I recently canvassed the idea of merging 1164 into the 1076
standard. The feedback was generally in favour of the idea, although with a
couple of caveats.
First, there was concern about backward compatibility and not breaking
legacy code. This can be addressed by ensuring that 1076 specify the
existence of library IEEE, and that the standard logic package continue to
be called IEEE.STD_LOGIC_1164.
Second, there was a suggestion that the standard logic package be an
optional part of the standard so that an implementation not be required to
implement it within a tool. If I understand the concern correctly, I think
it can be addressed without resort to optional parts of the standard. The
standard can just specify that a VHDL implementation provide the standard
logic package in library IEEE, and provide the reference source code for the
package. The standard can say that an implementation may choose to
accelerate standard logic by wiring it into the tool, but that's not
mandatory. Since the definition of the package is just standard VHDL, a
non-accelerated tool could just create a library called IEEE and compile the
package code into it in the same way as it compiles any other VHDL code into
a library.
So if these concerns are satisfied, that just leaves the reasons on favour
of merging.
The DASC Steering Committee, at its meeting just past, asked that the P1164
and P1076 Working Groups formally consider merging 1164 into 1076. I
therefore call for discussion of the following motion:
That the specifications in Standard 1164-1993 and the change
proposals developed in P1164 be transferred to the P1076 Working
Group for inclusion in the next revision of Standard 1076 in such
a way that backward compatibilithy is maintained for VHDL models
that conform to Standard 1164-1993, and that the P1164 Working Group
be disbanded.
Please post any discussion to the list, mailto:vhdl-std-logic@eda.org. I'll
aim for starting a vote on the question on Friday 5 Mar (in 2 week's time
from now). Thanks.
Regards,
Peter Ashenden
P1164 WG Chair
-- Dr. Peter J. Ashenden peter@ashenden.com.au Ashenden Designs Pty. Ltd. www.ashenden.com.au PO Box 640 Ph: +61 8 8339 7532 Stirling, SA 5152 Fax: +61 8 8339 2616 Australia Mobile: +61 414 70 9106
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