[Fwd: from [Wolfgang Roethig <wroethig@necelam.com>]]


Subject: [Fwd: from [Wolfgang Roethig ]]
From: Peter Ashenden (peter@ashenden.com.au)
Date: Thu Feb 20 2003 - 19:13:20 PST


-----Forwarded Message-----

Date: Thu, 20 Feb 2003 10:16:21 -0800 (PST)
From: Wolfgang Roethig <wroethig@necelam.com>
Reply-To: Wolfgang Roethig <wroethig@necelam.com>
Subject: RE: CP-003
To: molenkam@cs.utwente.nl, peter@ashenden.com.au
Cc: vhdl-std-logic@server.eda.org

Peter and all,

> I'm not sure how you should extend '0' or '1' to operate with signed or
> unsigned operands. What does it mean to "and" two numbers together?

Presumably the "and" operation applies bitwise, when the
number is converted into a vector of binary digits.

Example:
        decimal 5 "and" decimal 4 =
        binary 101 "and" binary 100 =
        binary (1 and 1)(0 and 0)(1 and 0) =
        binary 100 =
        decimal 4

The interesting thing is what to do with numbers of different bitwidth,
what to do with the sign bit, what to do if one operand is signed and
the other is unsigned, and how to convert the resulting bit-vector back
into a number.

Best regards

        Wolfgang Roethig

> Subject: RE: CP-003
> From: Peter Ashenden <peter@ashenden.com.au>
> To: Bert Molenkamp <molenkam@cs.utwente.nl>
> Cc: vhdl-std-logic@eda.org
> Content-Transfer-Encoding: 7bit
> Date: 20 Feb 2003 14:08:09 +1030
> Mime-Version: 1.0
> Content-Transfer-Encoding: 7bit
>
> On Wed, 2003-02-19 at 21:00, Bert Molenkamp wrote:
>
> > Although not relevant (at this time) would a user expect the
> > proposed extension for math operators?
> > Signal a : signed (3 downto 0);
> > Signal b : unsigned( 3 downto 0);
> >
> > May be the user expects:
> > a and '1' ==> a and "1111" sign extension since a is a signed
> > b and '1' ==> b and "0001" since b is an unsigned
> > (In 1076.3 for arithmetic operations a +'1' (and b + '1')
> > is not supported)
>
> I'm not sure how you should extend '0' or '1' to operate with signed or
> unsigned operands. What does it mean to "and" two numbers together?
> Certainly there is no interpretation in the algebra of integers. I can
> only assume that a logical operator applied to a signed or unsigned
> operand is a shorthand for a conversion to bit_vector or
> std_ulogic_vector and operation upon the result. Thus, the semantics of
> an array/scalar logic operation applied to a signed or unsigned operand
> should be the same as applying the operation to the underlying
> bit_vector or std_ulogic_vector representation.
>
> In any case, I'd prefer to hand this argument over to the P1076.3
> working group. Let's constrain ourselves to thinking about what makes
> sense for std_lgic_1164.
>
> Cheers,
>
> PA
> --
> Dr. Peter J. Ashenden peter@ashenden.com.au
> Ashenden Designs Pty. Ltd. www.ashenden.com.au
> PO Box 640 Ph: +61 8 8339 7532
> Stirling, SA 5152 Fax: +61 8 8339 2616
> Australia Mobile: +61 414 70 9106
>



This archive was generated by hypermail 2b28 : Thu Feb 20 2003 - 19:13:59 PST