Subject: Re: CP-007 and CP-008: textio for std_logic_1164
From: Peter Ashenden (peter@ashenden.com.au)
Date: Tue Feb 18 2003 - 23:19:10 PST
On Tue, 2003-02-18 at 00:55, Jim Lewis wrote:
>
> 3) Add decimal read (dread see 4)
Why not call it "horror" or "extreme_fear"?! ;-)
> 4) For hread, oread, dread read enough characters to
> fill the array (if enough characters are not present
> then error). If there are extra characters, throw
> out the leftmost bits of the extra characters.
>
> This means to read a 21 bit hex address, I can simply
>
> hread(RB, addr) ;
>
> Otherwise to get the same meaning, I need to:
> variable addr_temp : std_logic_vector(23 downto 0) ;
>
> hread(RB, addr_temp) ;
> addr <= addr_temp(addr'range) ;
I would be uncomfortable with throwing away surplus bits silently. How
about reading sufficient digits to fill the array, and if there are
extra zero bits throw them away. If any extra bits are non-zero, then
complain. The rationale is that extra zero bits mean that the value
read could be represented in a number of bits equal to the array size.
For example, if we do a hex read into a 5-element vector and read 1F, we
get three extra 0 bits, but that's ok, since 1F can be represented in
five bits. On the other hand, if we read 3F, we get 001 as extra bits
and complain, since 3F needs at least six bits to represent it.
> 5) TO_STR, TO_HSTR, TO_OSTR, TO_DSTR, ...
> I would like a set of procedures that convert from a
> std_logic_vector, std_ulogic_vector to a string value.
> Very similar in concept to 'image except it works for
> strings. These functions are currently built into
> write, hwrite, and owrite. The advantage to providing
> these separately is that someone using assert or
> VHDL built-in write can use these conversions to allow
> the printing of std_logic_vector values.
>
> For example:
>
> assert (ExpectedVal = ReadVal)
> report "In ... Expected Value /= Read Value. Expected = " &
> TO_STR(Expected) & " Read = " & TO_STR(ReadVal))
> severity error ;
>
> Similarly without having the standard assert messages,
> a quick error message can be dumped to the console:
> if (ExpectedVal /= ReadVal) then
> write(OUTPUT, "In ... Expected Value /= Read Value. Expected = " &
> TO_HSTR(Expected) & " Read = " & TO_HSTR(ReadVal)) ) ;
> ErrCnt := ErrCnt + 1 ;
> end if ;
This is reminiscent of the Java idea of having a toString function for
every type. While 'image goes part of the way, it is no overloadable,
so we can't add parameters for formatting.
Maybe what we could define is textio functions called write that
parallel the write procedures. The differences would be
- return a string instead of having a line parameter
- no version with a GOOD parameter
For bit_vector, std_(u)logic_vector, etc, have a version of the write
procedures and functions that include a BASE parameter. Then you could
do
report "..." & write(ReadVal, base=>hex);
This does largely what you describe, but integrates more cleanly with
the existing language framework.
> Note, this is something I am asking for in VHDL-200X,
> so perhaps it needs to be coordinated with that effort.
> Note for 200X, we are considering fast-tracking some
> items (under circumstances like this) so they can get
> put into the current generation of packages.
Steve - another agenda item for Thursday?
Cheers,
PA
-- Dr. Peter J. Ashenden peter@ashenden.com.au Ashenden Designs Pty. Ltd. www.ashenden.com.au PO Box 640 Ph: +61 8 8339 7532 Stirling, SA 5152 Fax: +61 8 8339 2616 Australia Mobile: +61 414 70 9106
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