module mchecker(input event e, input logic w, a, b, d); 
  ap_event: assert property(@(e) a |=> b);

  always @ (e) begin : a1
    if(!w) begin : if1
	  $display("at ", $time());
       $display("w as sampled=", $sampled(w));
	   $display("w as seen=", w);
	   // ap_if_w: assert property(##1 b);  // no clock
	   ap_if_w: assert property(@(e) ##1 b);  // no clock 	  
	   end : if1 
  end : a1

  always @ (e) begin : a2
    if(!d) begin : if2
	   $display("at - ", $time());
       $display("d as sampled=", $sampled(d));
	   $display("d as seen=", d);
	   ap_if_d: assert property(@(e) ##1 b);
	   end : if2 
  end : a2	   
  
  ap_clk: assert property(@(e) d |=> b);
endmodule : mchecker 

module top;
    logic clk=1, a=0, b=1'b1, c=0, d;
  wire w;
  event e;
  initial forever #10 clk=!clk;
  always @ (posedge clk) -> e;
  always @ (negedge clk)
	a_rnd: assert(randomize(a, b));

  always @ (posedge clk)
	d <= a;
  assign w=!d;
  mchecker mchecker1(e, w, a, b, d);
  
endmodule : top