Re: [sv-ac] Call to vote: Due September 19

I need some clarification on this:
"Checker actual output arguments shall be variable_lvalue or net_lvalue."
So the actual can be a wire with a resolution function, correct?

 The checker instantiation should be treated as if there were a continuous
assignment executed in the Reactive region, of the checker formal argument
to the corresponding actual argument."
The construction of this sentence is odd to me. I don't understand this
 "of the checker formal argument to ..." following the comma.

Are we saying?
The checker instantiation should be treated as if there were a continuous
assignment executed in the Reactive region, and that assignment originates
from the checker formal argument to the corresponding actual argument.

*Please fix error in code*
From
checker mutex (logic sig, event clock, output bit failure);
  assert property ($onehot0(sig) failure = 1’b0 else failure = 1’b1;
endchecker : mutex

to
checker mutex (logic sig, event clock, output bit failure);
   assert property(@ (posedge clk) $onehot0(sig)) failure=1'b0; else
failure=1'b1;
endchecker : mutex
[Ben] *The model does not have a default clock, so the assertion needs a
clock. The assertion needs a closing ")" and the pass action block needs a
";"
*

On Fri, Sep 16, 2011 at 5:34 PM, Thomas J Thatcher <
thomas.thatcher@oracle.com> wrote:

> My Vote
>
> On 09/14/11 11:18, Korchemny, Dmitry wrote:
>
>
>> Mantis 2093 __x__ Yes ____ No
>>
>>
> In 17.2:
>
> I'm going to suggest, "In a similar manner to sequences and properties, . .
> . " for this sentence.
>
> (Note that "Similar to sequences and properties" is not correct, because
> this phrase functions as an adverb, describing the action "may specify")
>
>
> Tom
>
>
> --
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