Re: [sv-ac] Call to vote: Due September 12 (resend with correct version of the proposal)

My Vote.

Tom

> Mantis 2093 __x__ Yes ____ No
>
> http://www.eda-stds.org/mantis/view.php?id=2093
> <http://www.eda-stds.org/mantis/view.php?id=2093%20>
>
> http://www.eda-stds.org/mantis/file_download.php?file_id=5406&type=bug
> <http://www.eda-stds.org/mantis/file_download.php?file_id=5406&type=bug>

The first motivational example shows a checker output, but it doesn't
show how that output is being used to do something useful.

In the second motivational example, the checker model_fsm does not use
the variable state anywhere inside. I suggest omitting that port from
the checker port list. In both the before and after examples, there are
no input ports for signals or events that might cause a state change.

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