RASSP Digest Theme:
Technology Base Efforts
by Anthony J. Gadient & Vijay K. Madisetti
RASSP is a $150 million DARPA research program headed (in separate efforts) by Lockheed Martin's Advanced Technology Labs and Sanders Corporation. In addition to these prime efforts, over two dozen contractors (including universities, non-profit and commercial organizations) contribute to RASSP technology as part of several Technology Base contracts. Many impressive results from these efforts are documented in this special issue of the RASSP Digest.
The typical implementation of a RASSP system consists of three stages:
(1) hardware design and integration,
(2) software integration, and
(3) hardware-software integration and test.
These are described as follows:
(1) Hardware design and integration involves design of the architecture of the multiboard system (processors, interconnect, and topology), building and configuring the runtime deployed platform, designing and installing cabling, configuring each module, and assigning interrupts and memory addresses for each hardware subsystem. The goal is to create a memory map of the entire system and also deal with packaging and test issues.
(2) Software integration (primarily control and diagnostic software) involves developing device drivers and I/O interface libraries to enable communication with the application software. It also includes functional and unit testing of the runtime utility and software modules, and testing the various I/O utilities independent of the application software.
(3) Hardware-software integration and test involves designers using external test equipment and software to stimulate the prototype in an environment similar to the target one. Designers also provide an application development that allows the user to map their application onto the runtime hardware-software platform completed in stages (1) and (2). In a typical RASSP system, the second stage usually requires development of about twenty times the software (in lines of uncommented code) as the third stage.
RASSP is investigating two rapid prototyping approaches. In the first approach, an application is mapped onto a predefined, off-the-shelf embedded platform through code generation. In the second approach, the platform itself is designed, and integrated together with the application software.
In the first section of this issue of the RASSP Digest, the RASSP Technology Base results using the first approach described are presented. In these efforts, the runtime hardware and software is already pre-designed and available commercially off-the-shelf (COTS). In both articles, the Mercury Raceway platform is the target platform onto which the application is rapidly ported. Since the first two stages of the design process described previously are eliminated, this environment allows for rapid implementation as the two articles in this section show.
In the second section of the Digest, we focus on the second approach, where the actual hardware and the software architecture themselves are being designed. Clearly, there is a greater freedom in design choices with this approach, and more effort required in the design, integration and test. The articles in this section describe the new methodologies and tools developed by the RASSP Technology Base to address the challenges this increased flexibility provides.
Virtual prototyping in RASSP depends on the availability of a rich set of verified libraries at multiple levels of abstraction to aid in the design and verification process. The third section of the Digest describes the development of libraries from the performance level to the component level. Techniques for automating model generation and verification, and the issues of hybrid modeling are discussed.
RASSP and VHDL have been closely linked due to the very powerful expressive features of the language. Extensions to VHDL, as developed by some Technology Base efforts, are presented in the final section of the Digest.
We hope you will find the new technology and tools presented in this special issue of significant utility in your quest for an efficient system-level design automation environment. Extensive details on these RASSP developments are also found on the RASSP WWW server (http://rassp.scra.org).
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