Technology Base Efforts

In This Issue

  Editor's Corner

          Technology Base Efforts

  RASSP ESDA Tools Part 1: Detailed HW/SW Codesign

          An Application Configuration Language for
              Multicomputer Tool Development

          Autocoding Update

  RASSP ESDA Tools 2: Front-End HW/SW Codesign
  Design Tools

          EaSE Trades Technical Review

          System-Level Design Methodology for Embedded Signal Processors

          Numeric and Symbolic Algorithms for Signal Processing

          COMET Project: Hardware/Software Cosynthesis for DSP Systems

          ADEPT: A Unified Environment for System Design

          Performance Modeling Workbench - A VHDL-Based
              Hardware/Software Codesign Tool

          ANSI C to Behavioral VHDL Translator,
               Ada to Behavioral VHDL Translator

          MAT2DSP - A MATLAB Tool for the Automatic Evaluation of the
              Implementation Requirements of Signal Processing Algorithms

          Timing Insensitive Binary-to-Binary Translation (TIBBIT)

          Design Tools and Architectures for Dedicated DSP Processors

  RASSP Model Libraries: VHDL

          VHDL Hybrid Models

          Automated Generation of VHDL Processor Models
              for Simulation and Synthesis

          Mississippi State Develops On-Line FPGA VHDL Model Generator

  RASSP and VHDL Issues

          A Proposed Design Objectives Document for Object-Oriented VHDL

          The EDA Standards Roadmap and the EDA Industry Council

          A Formal Model of Digital Systems Compatible with VHDL