The RASSP Digest - Vol. 2, 4th. Qtr. 1995

RASSP Digest Theme:
Model Year Architectures

by Vijay K. Madisetti & Anthony J. Gadient

Effective reuse of past designs is critical to achieve the reductions in development time sought by the RASSP program. Improvements in functionality and performance are simpler to achieve if a design is implemented in an "upgradable" form, enabling easier recustomization towards different but related mission requirements. Consequently, any methodology that effectively reuses past designs, i.e, Design with Reuse (DwR), is predicated on the implementation and acceptance of an effective Design for Reuse (DfR) methodology. By building an effective DfR methodology, RASSP is enabling "model year" improvements in functionality and performance, similar to those achieved by the automobile industry, without extensive redesign or changes in the manufacturing process. The continuous improvement methodologies being developed by RASSP will ensure that RASSP subsystems are at the "state-of-the-shelf" when fielded, and continuously remain so throughout their lifetimes.

This issue of the RASSP Digest describes the model year methodology being developed by the two RASSP primes. A combination of Design for Reuse and Design with Reuse is being employed. In the first article, a modular approach to system integration is proposed through the use of a standard virtual interface (SVI) that encapsulates each system component (software or hardware) in a form that encourages interoperability and rapid "plug-and-play", ensuring quick upgrades of individual modular components to implement a model year methodology. In the second article, the model year upgrade process of a 2D IRST system to improve its functionality, performance and its form factors (size weight, area and power) is presented. The use of VHDL in documenting the system from concept to manufacture is illustrated. The RASSP efforts, illustrated by these two articles, are in line with mainstream industial efforts to develop standards for open systems and universal interfaces, including extensions to operating systems to enable interoperability with a variety of peripheral components.

The remainder of this issue presents some recent results from the Technology Base contracts that focus on the architectural and front-end design of RASSP systems, and includes comparisons with current non-RASSP methodologies.

Vijay K. Madisetti
School of Electrical & Computer Engineering,
Georgia Tech.
Atlanta, GA 30332-0250
vkm@ee.gatech.edu

Anthony J. Gadient SCRA
5300 International Blvd.
N. Charleston, SC 29418
gadient@scra.org

The RASSP Digest - Vol. 2, 4th. Qtr. 1995 newsletter/html/95q4/news_2.html