The RASSP Digest - Vol. 2, No. 1, 1st. Qtr. 1995

Announcing Summer '95 RASSP Short Courses

The RASSP Education & Facilitation team will offer two short courses on key advances of the RASSP program. Each of these courses is intended for design engineers and will provide hands-on exercises in addition to the lectures.

Rapid Prototyping Using VHDL

Topics Include:

- Basics/Structural VHDL
- RASSP Methodology Overview
- Virtual Prototyping using VHDL
- System Level Modeling
- System Level VHDL
- Hardware/Software Codesign
- Hardware Synthesis
- Test Technology Overview
- Libraries: Generation, Maintenance, and Documentation

Led by: Prof. J. Aylor, University of Virginia
Course Dates: August 7-11, 1995
Location: Boston, MA

Algorithm and Architectural Design and Prototyping of Embedded DSP Systems

Topics Include:

- RASSP Methodology Overview
- Algorithm/Functional Design for DSP
- DSP Architectures
- Scheduling and Assignment for DSP
- System Level Modeling
- Virtual Prototyping for DSP
- Hardware/Software Partitioning
- Communication and I/O Protocols

Led by: Prof. V. Madisetti, Georgia Institute of Technology
Course Dates: August 22-25, 1995
Location: Phoenix, AZ

Enrollment is limited to 20 attendees per course. A registration fee of $350 will be charged to cover lunches, refreshments, course material, and other administrative expenses.

---

The RASSP Digest - Vol. 2, No. 1, 1st. Qtr. 1995

---

newsletter/html/95q1/news_11.html