The RASSP Digest

The Martin Marietta RASSP Team Demonstrates and Presents Rapid Prototyping Concepts at the First Annual Conference

The Martin Marietta RASSP team demonstrated 16 rapid prototyping developments at the first Annual Conference at the Hyatt Regency in Crystal City, Virginia August 15-18.

The ARPA/Tri-Service-sponsored four-day conference was part of the government's mission to publicize the RASSP program, which will dramatically improve the way in which signal processors are developed and fielded. Eventually, the rapid prototyping technology, which has concurrent engineering at its core, will be applied to digital processing at large.

The Martin Marietta RASSP team members also presented seven papers covering various parts of the development to the nearly 400 conference participants.

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The Martin Marietta exhibit consisted of five booths. In one, it demonstrated its concept of operations. In the other four its subcontractors demonstrated various items of the program's enterprise system, architecture, hardware design, and pervasive technologies:

Enterprise System - Enterprise integration: Intergraph and Mentor - Library management integration: Aspect and Mentor - Manufacturing interfaces: SCRA - Electronic networking: MCC Architecture - Multiprocessor network synthesis: JRS - Simulation interoperability: BDTI, Alta, and U.C. Berkeley - Autocode generation: MCCI

Hardware Design - Hardware emulation for DICE: Quickturn and TRW - Simulation backplane for architecture verification: Precedence - System and board-level synthesis: Omniview - Multichip system design advisor: MCC - Model generation tools: LMG

Pervasive Technologies - Object-oriented VHDL extension: VISTA - Hierarchical test and economics advisor: MCC - Hierarchical built-in self-test design: LV Software - Parametric cost modeling: Martin Marietta PRICE Systems.

Companies interested in becoming beta sites for the RASSP methodology and design system should contact:

Jim Saultz
(609) 866-6402
via e-mail
jsaultz@atl.ge.com.