

From owner-ibis Wed Aug  1 08:42:36 2001
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From: "Peters, Stephen" <stephen.peters@intel.com>
To: "'Hailong Wang'" <hlwang@avanticorp.com>, ibis@eda.org, ibis-users@eda.org
Subject: RE: About relationshipp between R_pkg,C_pkg,L_pkg and R_dut, C_du
	t, L_dut
Date: Wed, 1 Aug 2001 08:41:38 -0700 
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Greetings:
 
  the R_pkg, C_pkg and L_pkg values are used to specify the minimum and
maximum values of the pin resistance, capacitance and inductance for the
entire package. These values appear under the [Package] keyword.  The R_dut,
C_dut and L_dut only represent the electrical characteristics of the pin
used when gathering data for the [Rising Waveform] and [Falling Waveform]
keywords.  The 'dut' in R_dut etc. means 'device under test'.
 
(Please note that it is recomended to gather the data in the waveform tables
with R_dut, C_dut and L_dut set to zero).
 
  Regards,
  Stephen Peters
  Intel Corp.

-----Original Message-----
From: Hailong Wang [mailto:hlwang@avanticorp.com]
Sent: Sunday, July 29, 2001 7:42 PM
To: ibis@eda.org; ibis-users@eda.org
Subject: About relationshipp between R_pkg,C_pkg,L_pkg and R_dut, C_dut,
L_dut


Hi, 
    I found that the R_pkg,C_pkg,L_pkg and R_dut, C_dut, L_dut have the very
similar functions. But form the IBIS Specification V3.2, I found they are
different. So I am confused, and want to the relationship between them. 

Thanks in advance! 

-- 

Best Regards.

Hai-long Wang

Tel:021-62837026x228

Avant! Shanghai R&D Center,  16th Floor, SunTong InfoPort Plaza

No.55, West Huaihai Road, Shanghai, 200030, P.R.China
  


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<BODY>
<DIV><FONT color=#0000ff face=Arial size=2><SPAN 
class=896163515-01082001>Greetings:</SPAN></FONT></DIV>
<DIV><FONT color=#0000ff face=Arial size=2><SPAN 
class=896163515-01082001></SPAN></FONT>&nbsp;</DIV>
<DIV><FONT size=2><FONT color=#0000ff><FONT face=Arial><SPAN 
class=896163515-01082001>&nbsp; the R_pkg, C_pkg and L_pkg values are used to 
specify the minimum and maximum values of the pin resistance, </SPAN><SPAN 
class=896163515-01082001>capacitance and inductance for the entire 
package.&nbsp;These values appear under the [Package] keyword.&nbsp; The R_dut, 
C_dut and L_dut only represent the electrical characteristics of the pin used 
when gathering data for the [<SPAN class=570013915-01082001>Rising Waveform] and 
[Falling Waveform]&nbsp;keywords.&nbsp; The 'dut' in R_dut etc. means 'device 
under test'.</SPAN></SPAN></FONT></FONT></FONT></DIV>
<DIV><FONT size=2><FONT color=#0000ff><FONT face=Arial><SPAN 
class=896163515-01082001><SPAN 
class=570013915-01082001></SPAN></SPAN></FONT></FONT></FONT>&nbsp;</DIV>
<DIV><FONT size=2><FONT color=#0000ff><FONT face=Arial><SPAN 
class=896163515-01082001><SPAN class=570013915-01082001>(Please note that it is 
recomended to gather the data in the waveform tables &nbsp;with R_dut, C_dut and 
L_dut set to zero).</SPAN></SPAN></FONT></FONT></FONT></DIV>
<DIV><FONT size=2><FONT color=#0000ff><FONT face=Arial><SPAN 
class=896163515-01082001><SPAN 
class=570013915-01082001></SPAN></SPAN></FONT></FONT></FONT>&nbsp;</DIV>
<DIV><FONT size=2><FONT color=#0000ff><FONT face=Arial><SPAN 
class=896163515-01082001><SPAN class=570013915-01082001>&nbsp; 
Regards,</SPAN></SPAN></FONT></FONT></FONT></DIV>
<DIV><FONT size=2><FONT color=#0000ff><FONT face=Arial><SPAN 
class=896163515-01082001><SPAN class=570013915-01082001>&nbsp; Stephen 
Peters</SPAN></SPAN></FONT></FONT></FONT></DIV>
<DIV><FONT size=2><FONT color=#0000ff><FONT face=Arial><SPAN 
class=896163515-01082001><SPAN class=570013915-01082001>&nbsp; Intel 
Corp.</SPAN></SPAN></FONT></FONT></FONT></DIV>
<BLOCKQUOTE>
  <DIV align=left class=OutlookMessageHeader dir=ltr><FONT face=Tahoma 
  size=2>-----Original Message-----<BR><B>From:</B> Hailong Wang 
  [mailto:hlwang@avanticorp.com]<BR><B>Sent:</B> Sunday, July 29, 2001 7:42 
  PM<BR><B>To:</B> ibis@eda.org; ibis-users@eda.org<BR><B>Subject:</B> About 
  relationshipp between R_pkg,C_pkg,L_pkg and R_dut, C_dut, 
  L_dut<BR><BR></DIV></FONT>Hi, <BR>&nbsp;&nbsp;&nbsp; I found that the 
  R_pkg,C_pkg,L_pkg and R_dut, C_dut, L_dut have the very similar functions. But 
  form the IBIS&nbsp;Specification&nbsp;V3.2, I found they are different. So I 
  am confused, and want to the relationship between them. 
  <P>Thanks in advance! <PRE>--&nbsp;
Best Regards.
Hai-long Wang
Tel:021-62837026x228
Avant! Shanghai R&amp;D Center,&nbsp; 16th Floor, SunTong InfoPort Plaza
No.55, West Huaihai Road, Shanghai, 200030, P.R.China</PRE>&nbsp; 
</BLOCKQUOTE></BODY></HTML>

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From owner-ibis Fri Aug  3 02:00:56 2001
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   "'ibis-users@eda.org'" <ibis-users@eda.org>
Subject: about [Driver Schedule]
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Hi,

    I got some questions about [Driver Schedule].
    Are there any other relationships between the models defined in
[Driver Schedule] except timing relationships?
    How can I judge the way buffer of this model is connected to that of
other models with the timing relationships?
    Where can I find the documents or test cases about [Driver
Schedule]?

    Any comment or suggestion will be greatly appreciated.

Thanks,
Li

 
From owner-ibis Fri Aug  3 08:18:07 2001
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From: "Cecilia Fleming" <Cecef@eia.org>
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Subject: Re: about [Driver Schedule]
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Our bank information is as follows:

First Union National Bank
ABA# 056007604
ACCT# 2000005725537
Bank Swift Code: PNBPUS33

Regards,

Cece


>>> Li Li <Li_Li@avanticorp.com> 08/03/01 05:00AM >>>
Hi,

    I got some questions about [Driver Schedule].
    Are there any other relationships between the models defined in
[Driver Schedule] except timing relationships?
    How can I judge the way buffer of this model is connected to that of
other models with the timing relationships?
    Where can I find the documents or test cases about [Driver
Schedule]?

    Any comment or suggestion will be greatly appreciated.

Thanks,
Li


 
From owner-ibis Fri Aug  3 11:36:07 2001
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OUCH!  Someone is bumming!

Adam Tambone



 
From owner-ibis Tue Aug  7 16:21:44 2001
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Sir,
     Where shall i find information regarding "driver schedule" in IBIS.

thanks
bharath.

 
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 

------------------------------------------------------- 

IBIS SUMMIT  

        SECOND CALL FOR  

                PARTICIPATION & 

                        PRESENTATIONS!!!  

------------------------------------------------------- 

~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 


             I B I S   S U M M I T   M E E T I N G 


Time/Date:    8:30 AM - 5:00 PM, Thursday, September 13, 2001 


Location:       The Crowne Plaza Hotel 

                       10 Lincoln Square 

                       Worcester, MA 

                       Tel:  (508) 791-1600 

                       Fax:  (508) 791-1796 

                

Content:        Presentations and Discussions 


Purpose:      Solicit and Exchange IBIS Model Related Information and Ideas. 


Sponsors:    North East Systems Associates, Inc. (NESA), 

                      IBIS Users Group 

                     Others to be determined 

                                         WE ARE LOOKING FOR ADDITIONAL SPONSORS! 

                  (contact Kathy Breda, breda@nesa.com 

                  or Bob Ross, bob_ross@mentor.com) 


PCB Conference: September 10-14, 2001 

East            Worcester's Centrum Centre 

                    Worcester, Massachusetts 

                    See http://www.pcbeast.com/ for more information. 


BACKGROUND 


The IBIS Users Group (IBIS East) has been formed under the leadership of   

Dr. Edward Sayre from North East Systems Associates, Inc. (NESA) and has 

been meeting to consider and forward IBIS model user concerns.  As a result 

of East coast meetings, the group has developed an IBIS Accuracy Handbook 

document and has initiated the project to format Connector Models.  These 

topics plus others of current interest to the EIA IBIS Open Forum will be 

discussed at this meeting. 


This meeting will be conducted as a formal IBIS Summit Meeting.  Presentation 

are expected to be available and archived in an electronic format, and minutes 

of the meeting will be issued.  Any pending formal decisions (votes) will be 

announced at least two weeks prior to the meeting. 



CALL FOR PARTICIPANTS 


People involved in IBIS Model development, EDA tool development, and digital 

circuit design are invited to participate to the Summit meeting.  If you plan 

to participate, please register with the information below: 


  Name: 

  E-mail address: 

  Company: 

  Telephone: 


Send to: 


  Kathy Breda (breda@nesa.com) 

   


CALL FOR PRESENTATIONS 


We are seeking presentations from individuals who have IBIS experiences 

or issues. 


Format of Presentation:  Overhead Projections 

Time:                    15-30 Minutes 

Electronic Archival:     We request electronic versions so that the 

                         presentations can be archived and also made 

                         available to non-attendees.  Formats used in 

                         the past have been text, Power Point, Word,  

                         Postscript, and Acrobat.  Electronic presentations 

                         should be made available by September 7, 2001. 

                         Otherwise the presenter will be expected to provide 

                         up to 50 copies for distribution. 



If you plan a presentation, please supply 


  Title: 

  Presenter: 

  E-mail address: 

  Company: 

  Telephone: 


  Estimate Time: 


Send this to: 


  Kathy Breda (breda@nesa.com) 



AGENDA 


The agenda includes presentations, discussions, breaks, and a luncheon (which 

will be provided).  This will be developed as presentation proposals are 

received.  So far the following presentations are planned: 

   

  "A Proposal for s2ibis3", Michael Steer, North Carolina State University 


  "Modeling the Radiated Emission of Micro-controllers", Etienne Sicard, 

  National Institute of Applied Science (INSA/DEIG), France 


  "Power/Ground Simulation with IBIS Models and Pin Mapping Issues", 

  Raj Raghuram, Sigrity, Inc. 


  A user presentation - title to be determined, Bob Haller, Cereva 


  Plus IBIS Macro Language and demonstration, IBIS Connector Specification, 

  and other IBIS issues. 


LIST OF NEARBY HOTELS 


See http://www.pcbeast.com for travel directions, hotels and other 

information. 


************************************************************** 



<bold><color><param>0000,0000,8080</param><bigger>


</bigger></color></bold><excerpt>


<center>_____________________________________________________________________________________________________


</center>


<center>Kathy Breda  | Director of Marketing & Sales 

North East Systems Associates, Inc.  |  5 LAN Drive, Suite 200  |
Westford, MA 01886 


[T]  978-392-8787      [F]  978-392-8686    [W] www.nesa.com 




</center></excerpt>
 
From owner-ibis Thu Aug  9 11:28:21 2001
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From: "Peters, Stephen" <stephen.peters@intel.com>
To: "'ibis-users@eda.org'" <ibis-users@eda.org>
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(Apparently, not everyone received the agenda for tomorrow's IBIS open forum
meeting.  I'm resending this to the users list.)



		     IBIS Open Forum Meeting Agenda
			      for 8/10/01

		 Bridge Number    Reservation #   Passcode
New Number --> (877) 299-1938   none            6350164

All meetings are 8:00 AM to 9:55 AM Pacific Time.  When you call into the 
meeting, ask for the IBIS Open Forum hosted by Will Hobbs and give the
Reservation Number and Passcode.

8:00 Check-In, Intros, Announcements                         Peters

     - Intros of New IBIS Participants, Meeting Quorum       Peters
     - Membership Update and Treasurers Report               Fleming/Ross
     - Review of Previous Meeting's Minutes (and ARs)        Peters
     - Miscellany/Announcements                              All
     - Press & Web Page Updates                              Huq, All
     - New Models Available, Library Update                  Leventhal, All
     - Opens for New Issues                                  All

8:15 Administrative and Project Discussions

     International/External Progress
     - IEC 62014-1 (IBIS Version 3.2)                        Fleming
     - pr EIAJ ED-5302 Standard for I/O Interface Model      
	  for Integrated Circuits (IMIC)                       Peters
     - IEC 62014-3 (ICEM) Integrated Circuits Electromagnetic 
       Model Proposal (IEC 93/67/NP IBIS and EMC Simulation) Perrin/Peters
     - JEDEC JC-16 Modeling and Testing                      Sessions
     - T10, Project 1414-DT - SCSI Signal Modeling           Barnes

     PCBEAST 2001 IBIS Summit Meeting                        Ross
     - Funding

     IBIS Model Review Committee                             Angulo/Ross

     Majordomo Update                                        Angulo

     New Administrative Issues                               All

8:45 Technical Discussion

     Connector Proposal Review                               Peters/Ross

     IBIS Futures Group Report (IBIS-X, API, BIRDxx)         Peters
     -- IBIS-X Parser Funding

     BIRD70.4 - Golden Waveforms  (VOTE)                     Edlund

     BIRD71 - Timing Test Loads in [Model Spec] to Support   Peters
              PCI & PCI-X   (VOTE)

     BIRD72 - Accommodating PMOS and NMOS/PMOS Series FET    Dagostino/Ross
              Models

     BIRD73 - Fall Back Submodel                             Ross

     Other Pending BIRDS                                     Peters

     ibischk3 Bug Tracking                                   Ross
     - BUG58 -  Wrong Bug Number for Missing R,L,C_pkg       Ross
                Subparameter(s)

     - BUG59 -  Crash with Decimal Points for [Package]      Mirmak
                Subparameters

     New Technical Issues                                    All

9:50 Wrap Up and Next Meetings Plans                         Peters

9:55 Sign Off


 
From owner-ibis Fri Aug 10 10:02:53 2001
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I made the following changes according to our discussion at today's Open
Forum call:

1. Specified table format should conform with [Rising/Falling Waveform].
2. Specified measurement location as driver/receiver I/O pad.
3. Only one waveform required rather than one waveform pair.
4. Changed Test_Load to Test_load.
5. Specified non-inverting driver output when using single-ended waveform
with differential driver.
6. Changed "SPICE" to "reference waveforms."

Greg Edlund
Electrical Packaging
IBM Server Technology Development
3605 Hwy. 52 N, Dept. HDC
Rochester, MN 55901
gedlund@us.ibm.com


*******************************************************************************
*******************************************************************************

BIRD ID#:      70.5
ISSUE TITLE:   Golden Waveforms
REQUESTOR:     Greg Edlund, IBM
DATE SUBMITTED:  March 16, 2001; April 16, 2001; April 18, 2001; May 4,
2001;
                 July 23, 2001; August 10, 2001
DATE ACCEPTED BY IBIS OPEN FORUM:     Pending

******************************************************************************
******************************************************************************

STATEMENT OF THE ISSUE:

Golden Waveforms are a set of SPICE waveforms simulated using known ideal
test loads.  They are useful in verifying the accuracy of behavioral
simulation results for any given simulator.  They are not the same thing as
the traditional VT tables recommended in the "IBIS Cookbook."  The "I/O
Buffer
Accuracy Handbook" recommends a set of ideal test loads for classical
push-pull and open-drain drivers.

There is currently a problem with including Golden Waveforms in an IBIS
datasheet: the simulator tries to use these waveforms to construct its
stimulus waveform, and erroneous simulations result.

This BIRD proposes a new syntactical construct to tell the simulator that a
waveform is a Golden Waveform.  The simulator may then choose to ignore the
data or (better yet) run a set of simulations using the network and circuit
parameters provided and report the correlation between the simulation
results
and the Golden Waveforms.  The mechanism for describing a Golden Waveform
involves two new keywords whose scope is global: [Test Load] and [Test
Data].
Under the [Test Data] keyword are eight Wavevform keywords whose scope is
local.

[Test Load] is a description of a test load network that may be referenced
by
any Golden Waveform under the [Test Data] keyword.  [Test Data] is a marker
keyword that indicates the beginning of a group of Golden Waveforms.


******************************************************************************

STATEMENT OF THE RESOLVED SPECIFICATIONS:

|=============================================================================
|
|    Keywords:  [Test Data]
|    Required:  No
| Description:  Indicates the beginning of a set of Golden Waveforms
|               and references the conditions under which they were
derived.
|               An IBIS file may contain any number of [Test Data] sections
|               representing different driver and load combinations.
|
|  Sub-Params:  Test_data_type, Driver_model, Driver_model_inv, Test_load
|
| Usage Rules:  The name following the [Test Data] keyword is required.
|               It allows a tool to select which data to analyze.
|
|               The Test_data_type subparameter is required, and its value
|               must be either "Single_ended" or "Differential."
|               The value of Test_data_type must match the value of
|*              Test_load_type found in the load called by Test_load.
|
|               The Driver_model subparameter is required.  Its value
|               specifies the "device-under-test" and must be a valid
[Model]
|               name.  Driver_model_inv is only legal if Test_data_type is
|               Differential.  Driver_model_inv is not required but may be
|               used in the case in which a differential driver uses two
|               different models for the inverting and non-inverting pins.
|
|               The Test_load subparameter is required and indicates which
|               [Test Load] was used to derive the Golden Waveforms. It
must
|               reference a valid [Test Load] name.
|
|-----------------------------------------------------------------------------
|
[Test Data] Data1
Test_data_type Single_ended
Driver_model Buffer1
Test_load Load1
|
|=============================================================================
|
|    Keywords:  [Rising Waveform Near], [Falling Waveform Near],
|               [Rising Waveform Far], [Falling Waveform Far],
|               [Diff Rising Waveform Near], [Diff Falling Waveform Near],
|               [Diff Rising Waveform Far], [Diff Falling Waveform Far]
|*   Required:  At least one Rising/Falling waveform is required under the
|               scope of the [Test Data] keyword.
| Description:  Describes the shape of the rising and falling Golden
|*              Waveforms of a given driver and a given [Test Load]
measured
|*              at the driver I/O pad (near) or receiver I/O pad (far).
|               A model developer may use the [Rising Waveform Near/Far]
and
|               [Falling Waveform Near/Far] keywords to document Golden
|               Waveforms whose purpose is to facilitate the correlation of
|*              reference waveforms and behavioral simulations.
|
|  Sub-Params:  None.
|
| Usage Rules:  The process, temperature, and voltage conditions under
which
|               the Golden Waveforms are generated must be identical to
those
|               used to generate the VI and VT tables. The Golden Waveforms
|               must be generated using unpackaged driver and receiver
models.
|               The simulator must NOT use the Golden Waveform tables in
the
|               construction of its internal stimulus function.
|
|*              The tables must conform to the format described under the
|*              [Rising Waveform] and [Falling Waveform] keywords.
|
|               Both differential and single-ended waveforms are allowed
|               regardless of the value of Test_data_type.  If
Test_data_type
|               is Singled_ended then differential waveforms will be
ignored.
|               If Test_data_type is Differential, a single-ended waveform
|*              refers to the model specified by Driver_model and the
|*              non-inverting driver output.
|
|-----------------------------------------------------------------------------
|
[Rising Waveform Far]
| Time            V(typ)              V(min)              V(max)
   0.0000s       25.2100mV           15.2200mV           43.5700mV
   0.2000ns       2.3325mV           -8.5090mV           23.4150mV
   0.4000ns       0.1484V            15.9375mV            0.3944V
   0.6000ns       0.7799V             0.2673V             1.3400V
   0.8000ns       1.2960V             0.6042V             1.9490V
   1.0000ns       1.6603V             0.9256V             2.4233V
   1.2000ns       1.9460V             1.2050V             2.8130V
   1.4000ns       2.1285V             1.3725V             3.0095V
   1.6000ns       2.3415V             1.5560V             3.1265V
   1.8000ns       2.5135V             1.7015V             3.1600V
   2.0000ns       2.6460V             1.8085V             3.1695V
| ...
  10.0000ns       2.7780V             2.3600V             3.1670V
|
[Falling Waveform Far]
| Time            V(typ)              V(min)              V(max)
   0.0000s        5.0000V             4.5000V             5.5000V
   0.2000ns       4.7470V             4.4695V             4.8815V
   0.4000ns       3.9030V             4.0955V             3.5355V
   0.6000ns       2.7313V             3.4533V             1.7770V
   0.8000ns       1.8150V             2.8570V             0.8629V
   1.0000ns       1.1697V             2.3270V             0.5364V
   1.2000ns       0.7539V             1.8470V             0.4524V
   1.4000ns       0.5905V             1.5430V             0.4368V
   1.6000ns       0.4923V             1.2290V             0.4266V
   1.8000ns       0.4639V             0.9906V             0.4207V
   2.0000ns       0.4489V             0.8349V             0.4169V
| ...
  10.0000ns       0.3950V             0.4935V             0.3841V
|
|=============================================================================
|
|    Keywords:  [Test Load]
|    Required:  No
| Description:  Defines a generic test load network and its associated
|               electrical parameters for reference by Golden Waveforms
|               under the [Test Data] keyword.  The Golden Waveform
|               tables correspond to a given [Test Load] which is specified
|               by the Test_load subparameter under the [Test Data]
keyword.
|
|  Sub-Params:  Test_load_type, C1_near, Rs_near, Ls_near, C2_near,
Rp1_near,
|               Rp2_near, Td, Zo, Rp1_far, Rp2_far, C2_far, Ls_far, Rs_far,
|               C1_far, V_term1, V_term2, Receiver_model,
Receiver_model_inv,
|               R_diff_near, R_diff_far.
|
| Usage Rules:  The Test_load_type subparameter is required, and its value
|               must be either "Single_ended" or "Differential."
|
|               The subparameters specify the electrical parameters
|               associated with a fixed generic test load.  The diagram
|               below describes the single_ended test load.
|
|               All subparameters except Test_load_type are optional.
|               If omitted, series elements are shorted and shunt elements
|               are opened by default.
|
|
|                                    V_term1
|                                 o-----------o
|                                 |           |
|                                 \           \
receiver_model_name
|   ______                        /           /
______
|  |      |  NEAR        Rp1_near \           \ Rp1_far          FAR  |
|
|  | |\   |                       /           /                       | |\
|
|  | | \  |   Rs_near  Ls_near    |   _____   |     Ls_far  Rs_far    | | \
|
|  | |  >-|---o--/\/\--@@@@--o----o--O_____)--o----o--@@@@--/\/\--o---|-|
> |
|  | | /  |   |              |    |   Td      |    |              |   | | /
|
|  | |/   |   | C1_near      |    \   Zo      \    | C2_far       |   | |/
|
|  |______|  ===            ===   /           /   ===            ===
|______|
|             |      C2_near |    \           \    |       C1_far |
|             |              |    /           /    |              |
|             |              |    |  V_term2  |    |              |
|             o--------------o    o-----------o    o--------------o
|             |                Rp2_near    Rp2_far                |
|            GND                                                 GND
|
|
|               If the Td subparameter is present, then the Zo subparameter
|               must also be present.  If the Td subparameter is not
present,
|               then the simulator must remove the transmission line from
|               the network and short the two nodes to which it was
|               connected.
|
|               V_term1 defines the termination voltage for parallel
|               termination resistors Rp1_near and Rp1_far.  This voltage
|               is not related to the [Voltage Range] keyword.
|               If either Rp1_near or Rp1_far is used, then V_term1 must
|               also be used.
|
|               V_term2 defines the termination voltage for parallel
|               termination resistors Rp2_near and Rp2_far.
|               If either Rp2_near or Rp2_far is used, then V_term2 must
|               also be used.
|
|
|               Receiver_model is optional and indicates which, if any,
|               receiver is connected to the far end node. If not used, the
|               network defaults to no receiver.
|
|               Receiver_model_inv is not required but may be used in the
|               case in which a differential receiver uses two different
|               models for the inverting and non-inverting pins.
|               Receiver_model_inv is ignored if Test_load_type is
|               Single-ended.
|
|               If Test_load_type is Differential, then the test load is a
|               pair of the above circuits.  If the R_diff_near or
R_diff_far
|               subparameter is used, a resistor is connected between the
|               near or far nodes of the two circuits.  If Test_load_type
is
|               Single_ended, R_diff_near and R_diff_far are ignored.
|
|-----------------------------------------------------------------------------
|
[Test Load] Load1
Test_load_type Single_ended
C1_near     = 1p
Rs_near     = 10
Ls_near     = 1n
C2_near     = 1p
Rp1_near    = 100
Rp2_near    = 100
Td          = 1ns
Zo          = 50
Rp1_far     = 100
Rp2_far     = 100
C2_far      = 1p
Ls_far      = 1n
Rs_far      = 10
C1_far      = 1p
R_diff_far  = 100
Receiver_model Input1
| variable      typ             min             max
Vterm1          1.5             1.4             1.6
Vterm2          0.0             0.0             0.0
|
| Example Transmission Line and Receiver test load from "I/O Buffer
Accuracy
| Handbook," section 3.4.4.
|
[Test Load] Tline_rcv
Td          = 1n
Zo          = 50
Receiver_model Input1
|
|-----------------------------------------------------------------------------

******************************************************************************

ANALYSIS PATH/DATA THAT LED TO SPECIFICATION:

Please refer to BIRD 69.1 for history.  BIRD 70 came about a result of an
attempt to make BIRD 69.1 upwardly compatible with IBIS-X.  BIRD 70 is
actually more compact and efficient because it allows multiple models to
access the same [Test Load].  Recommendations came from Bob Ross, Al Davis,
and the IBIS Open Forum, 3/2/01.

Changes between BIRD 69.1 and BIRD 70:

1. Scope of the "generic test load" is now global rather than being
   local to a particular model.  This is a big improvement.

2. Added one subparameter, Golden_test_load, to [Rising Waveform],
   [Falling Waveform] keywords.  Added text to describe new the
subparameter.
   The Golden_test_load subparameter calls a [Test Load].

3. Exported all the other code to the new [Test Load] keyword.

4. Removed T_ref subparameter. To do timing correlation, the simulator can
   pick a point on the 50 Ohm VT waveform as its "SPICE reference point"
and
   then simulate both the 50 Ohm load and the Golden_test_load to calculate
   a time difference.

5. Removed Pkg_pin parameter. It is too complicated. The user can model a
   simple single-pin lumped circuit using the parameters supplied.

6. Added Tline_present subparameter. If not used, the Tline should be
   removed from the simulation rather than assigned a very small delay
value.
   This prevents the simulator from taking ridiculously small time steps.

7. Replaced V_termxxx with tables similar to the dV/dt_x subparameters.
   This makes the BIRD more economical.

8. Got rid of the paragraph that read, "Using the Golden Waveform
tables..."
   This seemed to be redundant.

9. Specified which parameters are optional and which are required.


Changes between BIRD 70 and BIRD 70.1/70.2:

 1. Moved the Golden Waveforms OUT of the [Model] scope and under the
    scope of a new keyword, [Test Data].

 2. Changed [Rising Waveform] to [Rising Waveform Near/Far].
    Changed [Falling Waveform] to [Falling Waveform Near/Far].

 3. Added subparameter Driver_model under [Rising Golden Waveform] and
    [Falling Golden Waveform].  This is necessary because the waveforms
    are now outside the scope of the [Model].

 4. Changed the subparameter Golden_test_load to Test_load.

 5. Added the Vx_rise/fall subparameters to indicate the end of a timing
    interval for timing correlation.

 6. Added Tmeas_rise/fall to facilitate timing correlation.

 7. Added subparameters Test_data_type and Test_load_type to facilitate
    upward compatibility with future versions of IBIS.

 8. Removed Tline_present subparameter in favor of language explaining
    that the simulator should remove the Tline if Td is not present.

 9. Moved Driver_model and Test_load under the scope of [Test Data].

10. R_diff became R_diff_near and R_diff_far.

11. Removed timing-related keywords:
    Tmeas_rise, Tmeas_fall, Vx_rise, Vx_fall
    This function can be achieved with less complexity by including a
    Golden Waveform that represents the standard (timing) test load.

12. Added four differential waveform keywords.

Changes between BIRD 70.3 and BIRD 70.4 (see lines beginning with |* ):

 1. Added subparameter Driver_model_inv under [Test Data].

 2. Added subparameter Receiver_model_inv under [Test Load].

 3. Added language defining the legal values of Test_data_type.

 4. Made Test_load_type a required subparameter.

 5. Made Vterm subparameters required if the corresponding resistors are
    used.

Changes between BIRD 70.4 and BIRD 70.5 (see lines beginning with |* ):

 1. Specified table format should conform with [Rising/Falling Waveform].

 2. Specified measurement location as driver/receiver I/O pad.

 3. Only one waveform required rather than one waveform pair.

 4. Changed Test_Load to Test_load.

 5. Specified non-inverting driver output when using single-ended waveform
    with differential driver.

 6. Changed "SPICE" to "reference waveforms."

******************************************************************************

ANY OTHER BACKGROUND INFORMATION:


See BIRD 69.1.

******************************************************************************

 
From owner-ibis Fri Aug 10 10:32:28 2001
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From: "Peters, Stephen" <stephen.peters@intel.com>
To: "'ibis-users@eda.org'" <ibis-users@eda.org>,
   "'ibis@eda.org'"
	 <ibis@eda.org>
Subject: ibis@eda.org address experiencing problems, use ibis-users@eda.or
	g
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Greetings:

   With the recent changeover to Majordomo, users have been experiencing
problems with posts to the general IBIS mailing list (ibis@eda.org) not
propagating to everyone on the list.  While the IBIS postmaster and the
folks in charge of the eda.org server investigate this problem, I ask
everyone to Cc: any postings you make to the IBIS reflector to the
ibis-users@eda.org mail address also.  The IBIS users reflector is
unaffected and is propagating normally.  

  To those on the IBIS users reflector I apologize for the extra mail
traffic.  Hopefully, we will have this problem resolved shortly.


  Regards,
  Stephen Peters
  Intel Corp.
  Chair EIA/IBIS Open Forum

 
From owner-ibis Mon Aug 13 15:15:04 2001
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From: "Ross, Bob" <bob_ross@mentorg.com>
To: r58559@email.sps.mot.com, yokede@msil.sps.mot.com, ibis-users@eda.org
Cc: stephen.peters@intel.com, ibis@eda.org
Subject: IBIS - I/O Buffer Modeling Cookbook
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Hello Yoked:

We are temporarily having reflector e-mail problems,
so you message did not get sent to the general list.

However, I am responding on the ibis-users reflector
and copying Stephen Peters, who authored the Cookbook.
My responses are in your text noted by "*" marks.  These
are brief responses without looking at the Cookbook
document.  I am trying to convey what was intended,
not any editorial issues regarding how it is documented.

Bob Ross
Mentor Graphics

---------------------


Subject: I/O buffer modeling cookbook
From: Yoked Erlich (r58559) (r58559@email.sps.mot.com)
Date: Sun Aug 12 2001 - 04:18:21 PDT 


Hi , 

I would like to ask some questions about the 'I/O buffer modeling 
cookbook' 
paper (revision 2.0X) , Which I've got from 'www.eig.org' web site. 

1. Is there anywhere I can find revision 3.2 cookbook? 

* No, a Version 3.2 Cookbook has not been written.  Cookbook 2 was
intended to cover Version 3.2 features, but we never got that far.

2. I've an I/O buffer model which working in some chip pads as I/O , 
some pads as steady input and some pads as steady output. 
    I would like to know if the buffer grouping is made by the buffer 
type or by the pad direction? 
    If buffer type is the answer so one model with I/O type in enough 
for this buffer, 
    If pad direction is the answer so three model is needed for this 
buffer , I/O model , Input model and Output model 
    ( in this case Input and Output model tests will be exactly the same 
as I/O model ) . 

* If the buffer is truely an I/O, then it should be provided and
documented as I/O.  A user might have additional knowledge that
certain I/O buffers are configured only as Input or Output buffers.
It would be permissible to modify that instance of the model and
just change the Model_type.  That would help the EDA tool do
only the simulations that are relevant for the design.

3-6 questions are about 'Extracting Data for the [Ramp] keyword' 
paragraph in the cookbook : 
3. It is written that 'if the device does not have enough 
     drive capability to make a significant output transition than a 
higher load may be used' , 
     How much is significant output transition ? 

* I do not have any hard guideline.  I prefer impedances in the
order of magnitude of transmission line loads since that is a
typical high-speed design application.  That ususally captures
a fast edge that would be seen with a PCB interconnect.

* This makes no sense for certain weak buffers which would
require multiple reflections to change from one state to the
other for an open line.  If the application is not high-speed,
then it does not manner.   I would guess that a higher value
load might be OK for a driver source impedance > 300 ohms. 
Others might have different ideas. 


4. it is written that ' For an open drain , measure the rise and fall 
time into the load resistor and voltage used 
    by the manufacture when specifying propagation delays' , This 
sentence is not clear 
    what is the test structure in open drain buffer case?. 

* This is ambiguous.  I prefer low impedance (50 ohm) pullups to
capture a faster edge.  This may be in the order of magnitude of
the load seen during the intial part of the transition when the
device is connected through a PCB interconnect.

5. it is written that ' Falling edge ramp data is captured with the load 
resistor tied to VCC' 
    , Is VCC mean the pmos Driver source voltage (pad voltage) or low 
voltage? 

* This means that one end of the load resistor is connected to 
Vcc, and the other end is connected to the output pad.

6. It is written that 'simulations are performed with C_comp included in 
the circuit' , This sentence is not clear. 
    As I understood C_comp is the capacitance seen when looking from the 
pad back into the buffer , 
    It is written that C_comp should be added to the simulation , but 
C_comp is not a capacitor it is capacitance measurement.

* It is difficult to de-embed the die capacitance information from a
Spice net list (since some of the contribution is due to paramaters
within the transistor/diode models) or from a real physical measurements.

* So the intent is to clarify that the die capacitance is already
included in any waveform extraction.  Since C_comp is a first order
approximation of the die capacitance, its effects should be included
in an EDA tool simulation.  I have not looked at the specific
wording, but I assume this is confusing.

7. In 'Ground Clamp' paragraph it is written that 'The data in table 
must cover the range of -Vcc to Vcc ' , 
    Isn't it suppose to be -Vcc to 2*Vcc ? 

* This response also covers 9.

* No, the minimum range is intended to be -vcc to vcc.  The Power
Clamp covers from vcc to 2vcc.  When this minimum range was
established, most Inputs were at negligle current at Vcc and the
slope (current vs voltage) was also nearly 0.  So concatenation
of the tables produced the same effect as extrapolation.

* It is allowed to extend the clamp ranges beyond the specified
range.  In some cases you should do so, especially if you are
including the effect of an internal terminator.  In such cases,
the conditions above are not met, and I prefer -vcc to 2vcc for
both clamp tables.  Care must be taken so that
currents are not double counted.  However, for many situations,
the "minimal" IBIS guidelines are sufficient.

8. In 'pulldn' paragraph it is written 'If the buffer is a 3-state 
device then first subtract the ground clamp current 
    from the pulldown current then enter the result into the [pulldown] 
table' , 
    first , it is written above the graph 'Pullup I/V curve after 
subtraction of ground clamp currents' Which is probably mistake. 
    second , Should I replace the pulldn results in Ibis model file 
after the subtraction?

* What is entered in the [Pulldown] table is the result after
subtraction.

9. In 'Power Clamp' It is written that 'the data in the table must cover 
the range of vcc to vcc*2' , 
    Isn't the range suppose to be -Vcc to 2*Vcc ? 

* See 7 above.

--
With regards,
Yoked.
_____________________________________
E-mail:       yokede@msil.sps.mot.com
Tel: 972-9-9522482 Fax: 972-9-9522888
WIRELESS     CIRCUIT  - IO      GROUP
MOTOROLA     SEMICONDUCTOR     ISRAEL
 
From owner-ibis Tue Aug 14 00:40:17 2001
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From: "=?big5?q?Tomus,tog?=" <chinesechunghwa@yahoo.com.tw>
Subject: RE: IBIS - I/O Buffer Modeling Cookbook
To: ibis-users@eda.org
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Hi :

The IBIS ver. 3.2 is not written in CookBook,
but the method is found in Specification Section 9  4)
point
transit Time extraction , it may be some help for to
find the wave form.

Thank!

ibis-users from yahoo

Hello Yoked:

We are temporarily having reflector e-mail problems,
so you message did not get sent to the general list.

However, I am responding on the ibis-users reflector
and copying Stephen Peters, who authored the Cookbook.
My responses are in your text noted by "*" marks. 
These
are brief responses without looking at the Cookbook
document.  I am trying to convey what was intended,
not any editorial issues regarding how it is
documented.

Bob Ross
Mentor Graphics

---------------------


Subject: I/O buffer modeling cookbook
From: Yoked Erlich (r58559) (r58559@email.sps.mot.com)
Date: Sun Aug 12 2001 - 04:18:21 PDT 


Hi , 

I would like to ask some questions about the 'I/O
buffer modeling 
cookbook' 
paper (revision 2.0X) , Which I've got from
'www.eig.org' web site. 

1. Is there anywhere I can find revision 3.2 cookbook?


* No, a Version 3.2 Cookbook has not been written. 
Cookbook 2 was
intended to cover Version 3.2 features, but we never
got that far.

2. I've an I/O buffer model which working in some chip
pads as I/O , 
some pads as steady input and some pads as steady
output. 
    I would like to know if the buffer grouping is
made by the buffer 
type or by the pad direction? 
    If buffer type is the answer so one model with I/O
type in enough 
for this buffer, 
    If pad direction is the answer so three model is
needed for this 
buffer , I/O model , Input model and Output model 
    ( in this case Input and Output model tests will
be exactly the same 
as I/O model ) . 

* If the buffer is truely an I/O, then it should be
provided and
documented as I/O.  A user might have additional
knowledge that
certain I/O buffers are configured only as Input or
Output buffers.
It would be permissible to modify that instance of the
model and
just change the Model_type.  That would help the EDA
tool do
only the simulations that are relevant for the design.

3-6 questions are about 'Extracting Data for the
[Ramp] keyword' 
paragraph in the cookbook : 
3. It is written that 'if the device does not have
enough 
     drive capability to make a significant output
transition than a 
higher load may be used' , 
     How much is significant output transition ? 

* I do not have any hard guideline.  I prefer
impedances in the
order of magnitude of transmission line loads since
that is a
typical high-speed design application.  That ususally
captures
a fast edge that would be seen with a PCB
interconnect.

* This makes no sense for certain weak buffers which
would
require multiple reflections to change from one state
to the
other for an open line.  If the application is not
high-speed,
then it does not manner.   I would guess that a higher
value
load might be OK for a driver source impedance > 300
ohms. 
Others might have different ideas. 


4. it is written that ' For an open drain , measure
the rise and fall 
time into the load resistor and voltage used 
    by the manufacture when specifying propagation
delays' , This 
sentence is not clear 
    what is the test structure in open drain buffer
case?. 

* This is ambiguous.  I prefer low impedance (50 ohm)
pullups to
capture a faster edge.  This may be in the order of
magnitude of
the load seen during the intial part of the transition
when the
device is connected through a PCB interconnect.

5. it is written that ' Falling edge ramp data is
captured with the load 
resistor tied to VCC' 
    , Is VCC mean the pmos Driver source voltage (pad
voltage) or low 
voltage? 

* This means that one end of the load resistor is
connected to 
Vcc, and the other end is connected to the output pad.

6. It is written that 'simulations are performed with
C_comp included in 
the circuit' , This sentence is not clear. 
    As I understood C_comp is the capacitance seen
when looking from the 
pad back into the buffer , 
    It is written that C_comp should be added to the
simulation , but 
C_comp is not a capacitor it is capacitance
measurement.

* It is difficult to de-embed the die capacitance
information from a
Spice net list (since some of the contribution is due
to paramaters
within the transistor/diode models) or from a real
physical measurements.

* So the intent is to clarify that the die capacitance
is already
included in any waveform extraction.  Since C_comp is
a first order
approximation of the die capacitance, its effects
should be included
in an EDA tool simulation.  I have not looked at the
specific
wording, but I assume this is confusing.

7. In 'Ground Clamp' paragraph it is written that 'The
data in table 
must cover the range of -Vcc to Vcc ' , 
    Isn't it suppose to be -Vcc to 2*Vcc ? 

* This response also covers 9.

* No, the minimum range is intended to be -vcc to vcc.
 The Power
Clamp covers from vcc to 2vcc.  When this minimum
range was
established, most Inputs were at negligle current at
Vcc and the
slope (current vs voltage) was also nearly 0.  So
concatenation
of the tables produced the same effect as
extrapolation.

* It is allowed to extend the clamp ranges beyond the
specified
range.  In some cases you should do so, especially if
you are
including the effect of an internal terminator.  In
such cases,
the conditions above are not met, and I prefer -vcc to
2vcc for
both clamp tables.  Care must be taken so that
currents are not double counted.  However, for many
situations,
the "minimal" IBIS guidelines are sufficient.

8. In 'pulldn' paragraph it is written 'If the buffer
is a 3-state 
device then first subtract the ground clamp current 
    from the pulldown current then enter the result
into the [pulldown] 
table' , 
    first , it is written above the graph 'Pullup I/V
curve after 
subtraction of ground clamp currents' Which is
probably mistake. 
    second , Should I replace the pulldn results in
Ibis model file 
after the subtraction?

* What is entered in the [Pulldown] table is the
result after
subtraction.

9. In 'Power Clamp' It is written that 'the data in
the table must cover 
the range of vcc to vcc*2' , 
    Isn't the range suppose to be -Vcc to 2*Vcc ? 

* See 7 above.

--
With regards,
Yoked.
_____________________________________
E-mail:       yokede@msil.sps.mot.com
Tel: 972-9-9522482 Fax: 972-9-9522888
WIRELESS     CIRCUIT  - IO      GROUP
MOTOROLA     SEMICONDUCTOR     ISRAEL


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From owner-ibis Thu Aug 16 07:52:11 2001
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Date: Thu, 16 Aug 2001 07:51:16 -0700 (PDT)
From: Syed Huq <shuq@cisco.com>
Reply-To: Syed Huq <shuq@cisco.com>
Subject: FREE IBIS utility from Zuken
To: ibis-users@eda.org
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X-Mailer: dtmail 1.2.1 CDE Version 1.2.1 SunOS 5.6 sun4u sparc 

IBIS fans:

Zuken is providing a FREE utility that can give you additional information on an 
IBIS model along with parsing the model.

"ibisinf" does more than simple checking (that it will do only without any 
argument) - with either -c (for component info) or -m for model info it will 
pass out all information of all the components (or the models) which are 
included in that IBIS file.

Runs on Solaris, HP, Linux and Windows.

Follow the link and look under the Golden Parser:

http://www.eigroup.org/IBIS/tools.htm

Regards,
Syed
webmaster

 
From owner-ibis Tue Aug 21 07:41:42 2001
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To: "Ross, Bob" <bob_ross@mentorg.com>, ibis-users@eda.org,
   stephen.peters@intel.com, ibis@eda.org,
   "Sergey Sofer (r53493)" <r53493@email.sps.mot.com>
CC: Lior Aviv <liora@msil.sps.mot.com>
Subject: Re: IBIS - I/O Buffer Modeling Cookbook
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Hi ,

There are another few questions about ibischk3 results:

1. I've got the next warning:
 WARNING - [Model] iovb has no description of the buffer's high state
                    DC drive characteristics (no [Pullup] table).  This
warning
                    can be silenced by changing the Model_type or by adding
a
                    [Pullup] table.
This cell ('iovb') is 'Open_drain' type which according to Ibis maker cook
book do not
suppose to have [Pullup] table , only the [pulldown],[gnd_clamp] and
[power_clamp] tables ,
What do you think might be the reason of this error ?.

2. I've got the next warning:
WARNING (line  427) - Pulldown Typical data is non-monotonic
WARNING (line  427) - Pulldown Maximum data is non-monotonic
WARNING (line  428) - Pulldown Minimum data is non-monotonic
according to pulldn subtraction gnd_clamp cookbook and standard instructions
,
it is impossible to get monotonic data.
It is even mentioned in the standard that the [pulldn] or  [pullup] tables
might be non-monotonic.
Is it all right to ignore this warning ?

With regards

Yoked.
"Ross, Bob" wrote:

> Hello Yoked:
>
> We are temporarily having reflector e-mail problems,
> so you message did not get sent to the general list.
>
> However, I am responding on the ibis-users reflector
> and copying Stephen Peters, who authored the Cookbook.
> My responses are in your text noted by "*" marks.  These
> are brief responses without looking at the Cookbook
> document.  I am trying to convey what was intended,
> not any editorial issues regarding how it is documented.
>
> Bob Ross
> Mentor Graphics
>
> ---------------------
>
> Subject: I/O buffer modeling cookbook
> From: Yoked Erlich (r58559) (r58559@email.sps.mot.com)
> Date: Sun Aug 12 2001 - 04:18:21 PDT
>
> Hi ,
>
> I would like to ask some questions about the 'I/O buffer modeling
> cookbook'
> paper (revision 2.0X) , Which I've got from 'www.eig.org' web site.
>
> 1. Is there anywhere I can find revision 3.2 cookbook?
>
> * No, a Version 3.2 Cookbook has not been written.  Cookbook 2 was
> intended to cover Version 3.2 features, but we never got that far.
>
> 2. I've an I/O buffer model which working in some chip pads as I/O ,
> some pads as steady input and some pads as steady output.
>     I would like to know if the buffer grouping is made by the buffer
> type or by the pad direction?
>     If buffer type is the answer so one model with I/O type in enough
> for this buffer,
>     If pad direction is the answer so three model is needed for this
> buffer , I/O model , Input model and Output model
>     ( in this case Input and Output model tests will be exactly the same
> as I/O model ) .
>
> * If the buffer is truely an I/O, then it should be provided and
> documented as I/O.  A user might have additional knowledge that
> certain I/O buffers are configured only as Input or Output buffers.
> It would be permissible to modify that instance of the model and
> just change the Model_type.  That would help the EDA tool do
> only the simulations that are relevant for the design.
>
> 3-6 questions are about 'Extracting Data for the [Ramp] keyword'
> paragraph in the cookbook :
> 3. It is written that 'if the device does not have enough
>      drive capability to make a significant output transition than a
> higher load may be used' ,
>      How much is significant output transition ?
>
> * I do not have any hard guideline.  I prefer impedances in the
> order of magnitude of transmission line loads since that is a
> typical high-speed design application.  That ususally captures
> a fast edge that would be seen with a PCB interconnect.
>
> * This makes no sense for certain weak buffers which would
> require multiple reflections to change from one state to the
> other for an open line.  If the application is not high-speed,
> then it does not manner.   I would guess that a higher value
> load might be OK for a driver source impedance > 300 ohms.
> Others might have different ideas.
>
> 4. it is written that ' For an open drain , measure the rise and fall
> time into the load resistor and voltage used
>     by the manufacture when specifying propagation delays' , This
> sentence is not clear
>     what is the test structure in open drain buffer case?.
>
> * This is ambiguous.  I prefer low impedance (50 ohm) pullups to
> capture a faster edge.  This may be in the order of magnitude of
> the load seen during the intial part of the transition when the
> device is connected through a PCB interconnect.
>
> 5. it is written that ' Falling edge ramp data is captured with the load
> resistor tied to VCC'
>     , Is VCC mean the pmos Driver source voltage (pad voltage) or low
> voltage?
>
> * This means that one end of the load resistor is connected to
> Vcc, and the other end is connected to the output pad.
>
> 6. It is written that 'simulations are performed with C_comp included in
> the circuit' , This sentence is not clear.
>     As I understood C_comp is the capacitance seen when looking from the
> pad back into the buffer ,
>     It is written that C_comp should be added to the simulation , but
> C_comp is not a capacitor it is capacitance measurement.
>
> * It is difficult to de-embed the die capacitance information from a
> Spice net list (since some of the contribution is due to paramaters
> within the transistor/diode models) or from a real physical measurements.
>
> * So the intent is to clarify that the die capacitance is already
> included in any waveform extraction.  Since C_comp is a first order
> approximation of the die capacitance, its effects should be included
> in an EDA tool simulation.  I have not looked at the specific
> wording, but I assume this is confusing.
>
> 7. In 'Ground Clamp' paragraph it is written that 'The data in table
> must cover the range of -Vcc to Vcc ' ,
>     Isn't it suppose to be -Vcc to 2*Vcc ?
>
> * This response also covers 9.
>
> * No, the minimum range is intended to be -vcc to vcc.  The Power
> Clamp covers from vcc to 2vcc.  When this minimum range was
> established, most Inputs were at negligle current at Vcc and the
> slope (current vs voltage) was also nearly 0.  So concatenation
> of the tables produced the same effect as extrapolation.
>
> * It is allowed to extend the clamp ranges beyond the specified
> range.  In some cases you should do so, especially if you are
> including the effect of an internal terminator.  In such cases,
> the conditions above are not met, and I prefer -vcc to 2vcc for
> both clamp tables.  Care must be taken so that
> currents are not double counted.  However, for many situations,
> the "minimal" IBIS guidelines are sufficient.
>
> 8. In 'pulldn' paragraph it is written 'If the buffer is a 3-state
> device then first subtract the ground clamp current
>     from the pulldown current then enter the result into the [pulldown]
> table' ,
>     first , it is written above the graph 'Pullup I/V curve after
> subtraction of ground clamp currents' Which is probably mistake.
>     second , Should I replace the pulldn results in Ibis model file
> after the subtraction?
>
> * What is entered in the [Pulldown] table is the result after
> subtraction.
>
> 9. In 'Power Clamp' It is written that 'the data in the table must cover
> the range of vcc to vcc*2' ,
>     Isn't the range suppose to be -Vcc to 2*Vcc ?
>
> * See 7 above.
>
> --
> With regards,
> Yoked.
> _____________________________________
> E-mail:       yokede@msil.sps.mot.com
> Tel: 972-9-9522482 Fax: 972-9-9522888
> WIRELESS     CIRCUIT  - IO      GROUP
> MOTOROLA     SEMICONDUCTOR     ISRAEL

--

With regards,

Yoked.

_____________________________________
E-mail:           yokede@motorola.com
Tel: 972-9-9522482 Fax: 972-9-9522888
WIRELESS     CIRCUIT  - IO      GROUP
MOTOROLA     SEMICONDUCTOR     ISRAEL



--------------4A80BE336704D4CEAA171CF1
Content-Type: text/html; charset=us-ascii
Content-Transfer-Encoding: 7bit

<!doctype html public "-//w3c//dtd html 4.0 transitional//en">
<html>
Hi ,
<p>There are another few questions about ibischk3 results:
<p>1. I've got the next warning:
<br><font color="#FF0000">&nbsp;WARNING - [Model] iovb has no description
of the buffer's high state</font>
<br><font color="#FF0000">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
DC drive characteristics (no [Pullup] table).&nbsp; This warning</font>
<br><font color="#FF0000">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
can be silenced by changing the Model_type or by adding a</font>
<br><font color="#FF0000">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
[Pullup] table.</font>
<br>This cell ('iovb') is 'Open_drain' type which according to Ibis maker
cook book do not
<br>suppose to have [Pullup] table , only the [pulldown],[gnd_clamp] and
[power_clamp] tables ,
<br>What do you think might be the reason of this error ?.
<p>2. I've got the next warning:
<br><font color="#FF0000">WARNING (line&nbsp; 427) - Pulldown Typical data
is non-monotonic</font>
<br><font color="#FF0000">WARNING (line&nbsp; 427) - Pulldown Maximum data
is non-monotonic</font>
<br><font color="#FF0000">WARNING (line&nbsp; 428) - Pulldown Minimum data
is non-monotonic</font>
<br>according to pulldn subtraction gnd_clamp cookbook and standard instructions
,
<br>it is impossible to get monotonic data.
<br>It is even mentioned in the standard that the [pulldn] or&nbsp; [pullup]
tables might be non-monotonic.
<br>Is it all right to ignore this warning ?
<p>With regards
<p>Yoked.
<br>"Ross, Bob" wrote:
<blockquote TYPE=CITE>Hello Yoked:
<p>We are temporarily having reflector e-mail problems,
<br>so you message did not get sent to the general list.
<p>However, I am responding on the ibis-users reflector
<br>and copying Stephen Peters, who authored the Cookbook.
<br>My responses are in your text noted by "*" marks.&nbsp; These
<br>are brief responses without looking at the Cookbook
<br>document.&nbsp; I am trying to convey what was intended,
<br>not any editorial issues regarding how it is documented.
<p>Bob Ross
<br>Mentor Graphics
<p>---------------------
<p>Subject: I/O buffer modeling cookbook
<br>From: Yoked Erlich (r58559) (r58559@email.sps.mot.com)
<br>Date: Sun Aug 12 2001 - 04:18:21 PDT
<p>Hi ,
<p>I would like to ask some questions about the 'I/O buffer modeling
<br>cookbook'
<br>paper (revision 2.0X) , Which I've got from 'www.eig.org' web site.
<p>1. Is there anywhere I can find revision 3.2 cookbook?
<p>* No, a Version 3.2 Cookbook has not been written.&nbsp; Cookbook 2
was
<br>intended to cover Version 3.2 features, but we never got that far.
<p>2. I've an I/O buffer model which working in some chip pads as I/O ,
<br>some pads as steady input and some pads as steady output.
<br>&nbsp;&nbsp;&nbsp; I would like to know if the buffer grouping is made
by the buffer
<br>type or by the pad direction?
<br>&nbsp;&nbsp;&nbsp; If buffer type is the answer so one model with I/O
type in enough
<br>for this buffer,
<br>&nbsp;&nbsp;&nbsp; If pad direction is the answer so three model is
needed for this
<br>buffer , I/O model , Input model and Output model
<br>&nbsp;&nbsp;&nbsp; ( in this case Input and Output model tests will
be exactly the same
<br>as I/O model ) .
<p>* If the buffer is truely an I/O, then it should be provided and
<br>documented as I/O.&nbsp; A user might have additional knowledge that
<br>certain I/O buffers are configured only as Input or Output buffers.
<br>It would be permissible to modify that instance of the model and
<br>just change the Model_type.&nbsp; That would help the EDA tool do
<br>only the simulations that are relevant for the design.
<p>3-6 questions are about 'Extracting Data for the [Ramp] keyword'
<br>paragraph in the cookbook :
<br>3. It is written that 'if the device does not have enough
<br>&nbsp;&nbsp;&nbsp;&nbsp; drive capability to make a significant output
transition than a
<br>higher load may be used' ,
<br>&nbsp;&nbsp;&nbsp;&nbsp; How much is significant output transition
?
<p>* I do not have any hard guideline.&nbsp; I prefer impedances in the
<br>order of magnitude of transmission line loads since that is a
<br>typical high-speed design application.&nbsp; That ususally captures
<br>a fast edge that would be seen with a PCB interconnect.
<p>* This makes no sense for certain weak buffers which would
<br>require multiple reflections to change from one state to the
<br>other for an open line.&nbsp; If the application is not high-speed,
<br>then it does not manner.&nbsp;&nbsp; I would guess that a higher value
<br>load might be OK for a driver source impedance > 300 ohms.
<br>Others might have different ideas.
<p>4. it is written that ' For an open drain , measure the rise and fall
<br>time into the load resistor and voltage used
<br>&nbsp;&nbsp;&nbsp; by the manufacture when specifying propagation delays'
, This
<br>sentence is not clear
<br>&nbsp;&nbsp;&nbsp; what is the test structure in open drain buffer
case?.
<p>* This is ambiguous.&nbsp; I prefer low impedance (50 ohm) pullups to
<br>capture a faster edge.&nbsp; This may be in the order of magnitude
of
<br>the load seen during the intial part of the transition when the
<br>device is connected through a PCB interconnect.
<p>5. it is written that ' Falling edge ramp data is captured with the
load
<br>resistor tied to VCC'
<br>&nbsp;&nbsp;&nbsp; , Is VCC mean the pmos Driver source voltage (pad
voltage) or low
<br>voltage?
<p>* This means that one end of the load resistor is connected to
<br>Vcc, and the other end is connected to the output pad.
<p>6. It is written that 'simulations are performed with C_comp included
in
<br>the circuit' , This sentence is not clear.
<br>&nbsp;&nbsp;&nbsp; As I understood C_comp is the capacitance seen when
looking from the
<br>pad back into the buffer ,
<br>&nbsp;&nbsp;&nbsp; It is written that C_comp should be added to the
simulation , but
<br>C_comp is not a capacitor it is capacitance measurement.
<p>* It is difficult to de-embed the die capacitance information from a
<br>Spice net list (since some of the contribution is due to paramaters
<br>within the transistor/diode models) or from a real physical measurements.
<p>* So the intent is to clarify that the die capacitance is already
<br>included in any waveform extraction.&nbsp; Since C_comp is a first
order
<br>approximation of the die capacitance, its effects should be included
<br>in an EDA tool simulation.&nbsp; I have not looked at the specific
<br>wording, but I assume this is confusing.
<p>7. In 'Ground Clamp' paragraph it is written that 'The data in table
<br>must cover the range of -Vcc to Vcc ' ,
<br>&nbsp;&nbsp;&nbsp; Isn't it suppose to be -Vcc to 2*Vcc ?
<p>* This response also covers 9.
<p>* No, the minimum range is intended to be -vcc to vcc.&nbsp; The Power
<br>Clamp covers from vcc to 2vcc.&nbsp; When this minimum range was
<br>established, most Inputs were at negligle current at Vcc and the
<br>slope (current vs voltage) was also nearly 0.&nbsp; So concatenation
<br>of the tables produced the same effect as extrapolation.
<p>* It is allowed to extend the clamp ranges beyond the specified
<br>range.&nbsp; In some cases you should do so, especially if you are
<br>including the effect of an internal terminator.&nbsp; In such cases,
<br>the conditions above are not met, and I prefer -vcc to 2vcc for
<br>both clamp tables.&nbsp; Care must be taken so that
<br>currents are not double counted.&nbsp; However, for many situations,
<br>the "minimal" IBIS guidelines are sufficient.
<p>8. In 'pulldn' paragraph it is written 'If the buffer is a 3-state
<br>device then first subtract the ground clamp current
<br>&nbsp;&nbsp;&nbsp; from the pulldown current then enter the result
into the [pulldown]
<br>table' ,
<br>&nbsp;&nbsp;&nbsp; first , it is written above the graph 'Pullup I/V
curve after
<br>subtraction of ground clamp currents' Which is probably mistake.
<br>&nbsp;&nbsp;&nbsp; second , Should I replace the pulldn results in
Ibis model file
<br>after the subtraction?
<p>* What is entered in the [Pulldown] table is the result after
<br>subtraction.
<p>9. In 'Power Clamp' It is written that 'the data in the table must cover
<br>the range of vcc to vcc*2' ,
<br>&nbsp;&nbsp;&nbsp; Isn't the range suppose to be -Vcc to 2*Vcc ?
<p>* See 7 above.
<p>--
<br>With regards,
<br>Yoked.
<br>_____________________________________
<br>E-mail:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; yokede@msil.sps.mot.com
<br>Tel: 972-9-9522482 Fax: 972-9-9522888
<br>WIRELESS&nbsp;&nbsp;&nbsp;&nbsp; CIRCUIT&nbsp; - IO&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
GROUP
<br>MOTOROLA&nbsp;&nbsp;&nbsp;&nbsp; SEMICONDUCTOR&nbsp;&nbsp;&nbsp;&nbsp;
ISRAEL</blockquote>

<pre>--&nbsp;

With regards,

Yoked.

_____________________________________
E-mail:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; yokede@motorola.com
Tel: 972-9-9522482 Fax: 972-9-9522888
WIRELESS&nbsp;&nbsp;&nbsp;&nbsp; CIRCUIT&nbsp; - IO&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; GROUP&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
MOTOROLA&nbsp;&nbsp;&nbsp;&nbsp; SEMICONDUCTOR&nbsp;&nbsp;&nbsp;&nbsp; ISRAEL</pre>
&nbsp;</html>

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From owner-ibis Tue Aug 21 09:09:40 2001
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From: "Matthew Flora" <mflora@innoveda.com>
To: "yoked erlich" <yokede@motorola.com>, <ibis-users@eda.org>,
   "Sergey Sofer \(r53493\)" <r53493@email.sps.mot.com>
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References: <3B78515E.4C06A898@mentor.com> <3B8272AF.73AAA8C1@motorola.com>
Subject: Re: IBIS - I/O Buffer Modeling Cookbook
Date: Tue, 21 Aug 2001 09:10:21 -0700
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Dear Yoked Erlich,

Regarding your first question:
Which version of ibischk3 are you using?  The latest version available is
3.2.7.  There was a bug in earlier versions that generated incorrect warnings
for open drain buffers.

Best regards,
Matthew Flora


----- Original Message -----
From: "yoked erlich" <yokede@motorola.com>
To: "Ross, Bob" <bob_ross@mentorg.com>; <ibis-users@eda.org>;
<stephen.peters@intel.com>; <ibis@eda.org>; "Sergey Sofer (r53493)"
<r53493@email.sps.mot.com>
Cc: "Lior Aviv" <liora@msil.sps.mot.com>
Sent: Tuesday, August 21, 2001 7:39 AM
Subject: Re: IBIS - I/O Buffer Modeling Cookbook


> Hi ,
>
> There are another few questions about ibischk3 results:
>
> 1. I've got the next warning:
>  WARNING - [Model] iovb has no description of the buffer's high state
>                     DC drive characteristics (no [Pullup] table).  This
> warning
>                     can be silenced by changing the Model_type or by adding
> a
>                     [Pullup] table.
> This cell ('iovb') is 'Open_drain' type which according to Ibis maker cook
> book do not
> suppose to have [Pullup] table , only the [pulldown],[gnd_clamp] and
> [power_clamp] tables ,
> What do you think might be the reason of this error ?.
>
> 2. I've got the next warning:
> WARNING (line  427) - Pulldown Typical data is non-monotonic
> WARNING (line  427) - Pulldown Maximum data is non-monotonic
> WARNING (line  428) - Pulldown Minimum data is non-monotonic
> according to pulldn subtraction gnd_clamp cookbook and standard instructions
> ,
> it is impossible to get monotonic data.
> It is even mentioned in the standard that the [pulldn] or  [pullup] tables
> might be non-monotonic.
> Is it all right to ignore this warning ?
>
> With regards
>
> Yoked.
> "Ross, Bob" wrote:
>
> > Hello Yoked:
> >
> > We are temporarily having reflector e-mail problems,
> > so you message did not get sent to the general list.
> >
> > However, I am responding on the ibis-users reflector
> > and copying Stephen Peters, who authored the Cookbook.
> > My responses are in your text noted by "*" marks.  These
> > are brief responses without looking at the Cookbook
> > document.  I am trying to convey what was intended,
> > not any editorial issues regarding how it is documented.
> >
> > Bob Ross
> > Mentor Graphics
> >
> > ---------------------
> >
> > Subject: I/O buffer modeling cookbook
> > From: Yoked Erlich (r58559) (r58559@email.sps.mot.com)
> > Date: Sun Aug 12 2001 - 04:18:21 PDT
> >
> > Hi ,
> >
> > I would like to ask some questions about the 'I/O buffer modeling
> > cookbook'
> > paper (revision 2.0X) , Which I've got from 'www.eig.org' web site.
> >
> > 1. Is there anywhere I can find revision 3.2 cookbook?
> >
> > * No, a Version 3.2 Cookbook has not been written.  Cookbook 2 was
> > intended to cover Version 3.2 features, but we never got that far.
> >
> > 2. I've an I/O buffer model which working in some chip pads as I/O ,
> > some pads as steady input and some pads as steady output.
> >     I would like to know if the buffer grouping is made by the buffer
> > type or by the pad direction?
> >     If buffer type is the answer so one model with I/O type in enough
> > for this buffer,
> >     If pad direction is the answer so three model is needed for this
> > buffer , I/O model , Input model and Output model
> >     ( in this case Input and Output model tests will be exactly the same
> > as I/O model ) .
> >
> > * If the buffer is truely an I/O, then it should be provided and
> > documented as I/O.  A user might have additional knowledge that
> > certain I/O buffers are configured only as Input or Output buffers.
> > It would be permissible to modify that instance of the model and
> > just change the Model_type.  That would help the EDA tool do
> > only the simulations that are relevant for the design.
> >
> > 3-6 questions are about 'Extracting Data for the [Ramp] keyword'
> > paragraph in the cookbook :
> > 3. It is written that 'if the device does not have enough
> >      drive capability to make a significant output transition than a
> > higher load may be used' ,
> >      How much is significant output transition ?
> >
> > * I do not have any hard guideline.  I prefer impedances in the
> > order of magnitude of transmission line loads since that is a
> > typical high-speed design application.  That ususally captures
> > a fast edge that would be seen with a PCB interconnect.
> >
> > * This makes no sense for certain weak buffers which would
> > require multiple reflections to change from one state to the
> > other for an open line.  If the application is not high-speed,
> > then it does not manner.   I would guess that a higher value
> > load might be OK for a driver source impedance > 300 ohms.
> > Others might have different ideas.
> >
> > 4. it is written that ' For an open drain , measure the rise and fall
> > time into the load resistor and voltage used
> >     by the manufacture when specifying propagation delays' , This
> > sentence is not clear
> >     what is the test structure in open drain buffer case?.
> >
> > * This is ambiguous.  I prefer low impedance (50 ohm) pullups to
> > capture a faster edge.  This may be in the order of magnitude of
> > the load seen during the intial part of the transition when the
> > device is connected through a PCB interconnect.
> >
> > 5. it is written that ' Falling edge ramp data is captured with the load
> > resistor tied to VCC'
> >     , Is VCC mean the pmos Driver source voltage (pad voltage) or low
> > voltage?
> >
> > * This means that one end of the load resistor is connected to
> > Vcc, and the other end is connected to the output pad.
> >
> > 6. It is written that 'simulations are performed with C_comp included in
> > the circuit' , This sentence is not clear.
> >     As I understood C_comp is the capacitance seen when looking from the
> > pad back into the buffer ,
> >     It is written that C_comp should be added to the simulation , but
> > C_comp is not a capacitor it is capacitance measurement.
> >
> > * It is difficult to de-embed the die capacitance information from a
> > Spice net list (since some of the contribution is due to paramaters
> > within the transistor/diode models) or from a real physical measurements.
> >
> > * So the intent is to clarify that the die capacitance is already
> > included in any waveform extraction.  Since C_comp is a first order
> > approximation of the die capacitance, its effects should be included
> > in an EDA tool simulation.  I have not looked at the specific
> > wording, but I assume this is confusing.
> >
> > 7. In 'Ground Clamp' paragraph it is written that 'The data in table
> > must cover the range of -Vcc to Vcc ' ,
> >     Isn't it suppose to be -Vcc to 2*Vcc ?
> >
> > * This response also covers 9.
> >
> > * No, the minimum range is intended to be -vcc to vcc.  The Power
> > Clamp covers from vcc to 2vcc.  When this minimum range was
> > established, most Inputs were at negligle current at Vcc and the
> > slope (current vs voltage) was also nearly 0.  So concatenation
> > of the tables produced the same effect as extrapolation.
> >
> > * It is allowed to extend the clamp ranges beyond the specified
> > range.  In some cases you should do so, especially if you are
> > including the effect of an internal terminator.  In such cases,
> > the conditions above are not met, and I prefer -vcc to 2vcc for
> > both clamp tables.  Care must be taken so that
> > currents are not double counted.  However, for many situations,
> > the "minimal" IBIS guidelines are sufficient.
> >
> > 8. In 'pulldn' paragraph it is written 'If the buffer is a 3-state
> > device then first subtract the ground clamp current
> >     from the pulldown current then enter the result into the [pulldown]
> > table' ,
> >     first , it is written above the graph 'Pullup I/V curve after
> > subtraction of ground clamp currents' Which is probably mistake.
> >     second , Should I replace the pulldn results in Ibis model file
> > after the subtraction?
> >
> > * What is entered in the [Pulldown] table is the result after
> > subtraction.
> >
> > 9. In 'Power Clamp' It is written that 'the data in the table must cover
> > the range of vcc to vcc*2' ,
> >     Isn't the range suppose to be -Vcc to 2*Vcc ?
> >
> > * See 7 above.
> >
> > --
> > With regards,
> > Yoked.
> > _____________________________________
> > E-mail:       yokede@msil.sps.mot.com
> > Tel: 972-9-9522482 Fax: 972-9-9522888
> > WIRELESS     CIRCUIT  - IO      GROUP
> > MOTOROLA     SEMICONDUCTOR     ISRAEL
>
> --
>
> With regards,
>
> Yoked.
>
> _____________________________________
> E-mail:           yokede@motorola.com
> Tel: 972-9-9522482 Fax: 972-9-9522888
> WIRELESS     CIRCUIT  - IO      GROUP
> MOTOROLA     SEMICONDUCTOR     ISRAEL
>
>
>

 
From owner-ibis Tue Aug 21 11:40:03 2001
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From: "Peters, Stephen" <stephen.peters@intel.com>
To: "'yoked erlich'" <yokede@motorola.com>,
   "Ross, Bob"
	 <bob_ross@mentorg.com>, ibis-users@eda.org,
   "Peters, Stephen"
	 <stephen.peters@intel.com>, ibis@eda.org,
   "Sergey Sofer (r53493)"
	 <r53493@email.sps.mot.com>
Cc: Lior Aviv <liora@msil.sps.mot.com>
Subject: RE: IBIS - I/O Buffer Modeling Cookbook
Date: Tue, 21 Aug 2001 11:39:09 -0700
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Hi Yoked:
 
  Regarding the non-monotonic warnings, I would still check the line number
on the pulldown curves and verify what is causing the non-monotonic warning.
It should be the area where ground clamp current was subtracted from the
total pulldown current and not somewhere else.
  By the way, when creating a model for a non-tristatable output (i.e. one
in which either the pullup or pulldown curves are always on) one does not
have to subtract ground and power clamp current from the curves.  In this
case the warning should not occur.
 
  Regards,
  Stephen Peters
  Intel Corp.
 

-----Original Message-----
From: yoked erlich [mailto:yokede@motorola.com]
Sent: Tuesday, August 21, 2001 7:40 AM
To: Ross, Bob; ibis-users@eda.org; stephen.peters@intel.com; ibis@eda.org;
Sergey Sofer (r53493)
Cc: Lior Aviv
Subject: Re: IBIS - I/O Buffer Modeling Cookbook


Hi , 

There are another few questions about ibischk3 results: 


1. I've got the next warning: 
 WARNING - [Model] iovb has no description of the buffer's high state 
                    DC drive characteristics (no [Pullup] table).  This
warning 
                    can be silenced by changing the Model_type or by adding
a 
                    [Pullup] table. 
This cell ('iovb') is 'Open_drain' type which according to Ibis maker cook
book do not 
suppose to have [Pullup] table , only the [pulldown],[gnd_clamp] and
[power_clamp] tables , 
What do you think might be the reason of this error ?. 


2. I've got the next warning: 
WARNING (line  427) - Pulldown Typical data is non-monotonic 
WARNING (line  427) - Pulldown Maximum data is non-monotonic 
WARNING (line  428) - Pulldown Minimum data is non-monotonic 
according to pulldn subtraction gnd_clamp cookbook and standard instructions
, 
it is impossible to get monotonic data. 
It is even mentioned in the standard that the [pulldn] or  [pullup] tables
might be non-monotonic. 
Is it all right to ignore this warning ? 


With regards 


Yoked. 
"Ross, Bob" wrote: 


Hello Yoked: 

We are temporarily having reflector e-mail problems, 
so you message did not get sent to the general list. 


However, I am responding on the ibis-users reflector 
and copying Stephen Peters, who authored the Cookbook. 
My responses are in your text noted by "*" marks.  These 
are brief responses without looking at the Cookbook 
document.  I am trying to convey what was intended, 
not any editorial issues regarding how it is documented. 


Bob Ross 
Mentor Graphics 


--------------------- 


Subject: I/O buffer modeling cookbook 
From: Yoked Erlich (r58559) (r58559@email.sps.mot.com) 
Date: Sun Aug 12 2001 - 04:18:21 PDT 


Hi , 


I would like to ask some questions about the 'I/O buffer modeling 
cookbook' 
paper (revision 2.0X) , Which I've got from 'www.eig.org' web site. 


1. Is there anywhere I can find revision 3.2 cookbook? 


* No, a Version 3.2 Cookbook has not been written.  Cookbook 2 was 
intended to cover Version 3.2 features, but we never got that far. 


2. I've an I/O buffer model which working in some chip pads as I/O , 
some pads as steady input and some pads as steady output. 
    I would like to know if the buffer grouping is made by the buffer 
type or by the pad direction? 
    If buffer type is the answer so one model with I/O type in enough 
for this buffer, 
    If pad direction is the answer so three model is needed for this 
buffer , I/O model , Input model and Output model 
    ( in this case Input and Output model tests will be exactly the same 
as I/O model ) . 


* If the buffer is truely an I/O, then it should be provided and 
documented as I/O.  A user might have additional knowledge that 
certain I/O buffers are configured only as Input or Output buffers. 
It would be permissible to modify that instance of the model and 
just change the Model_type.  That would help the EDA tool do 
only the simulations that are relevant for the design. 


3-6 questions are about 'Extracting Data for the [Ramp] keyword' 
paragraph in the cookbook : 
3. It is written that 'if the device does not have enough 
     drive capability to make a significant output transition than a 
higher load may be used' , 
     How much is significant output transition ? 


* I do not have any hard guideline.  I prefer impedances in the 
order of magnitude of transmission line loads since that is a 
typical high-speed design application.  That ususally captures 
a fast edge that would be seen with a PCB interconnect. 


* This makes no sense for certain weak buffers which would 
require multiple reflections to change from one state to the 
other for an open line.  If the application is not high-speed, 
then it does not manner.   I would guess that a higher value 
load might be OK for a driver source impedance > 300 ohms. 
Others might have different ideas. 


4. it is written that ' For an open drain , measure the rise and fall 
time into the load resistor and voltage used 
    by the manufacture when specifying propagation delays' , This 
sentence is not clear 
    what is the test structure in open drain buffer case?. 


* This is ambiguous.  I prefer low impedance (50 ohm) pullups to 
capture a faster edge.  This may be in the order of magnitude of 
the load seen during the intial part of the transition when the 
device is connected through a PCB interconnect. 


5. it is written that ' Falling edge ramp data is captured with the load 
resistor tied to VCC' 
    , Is VCC mean the pmos Driver source voltage (pad voltage) or low 
voltage? 


* This means that one end of the load resistor is connected to 
Vcc, and the other end is connected to the output pad. 


6. It is written that 'simulations are performed with C_comp included in 
the circuit' , This sentence is not clear. 
    As I understood C_comp is the capacitance seen when looking from the 
pad back into the buffer , 
    It is written that C_comp should be added to the simulation , but 
C_comp is not a capacitor it is capacitance measurement. 


* It is difficult to de-embed the die capacitance information from a 
Spice net list (since some of the contribution is due to paramaters 
within the transistor/diode models) or from a real physical measurements. 


* So the intent is to clarify that the die capacitance is already 
included in any waveform extraction.  Since C_comp is a first order 
approximation of the die capacitance, its effects should be included 
in an EDA tool simulation.  I have not looked at the specific 
wording, but I assume this is confusing. 


7. In 'Ground Clamp' paragraph it is written that 'The data in table 
must cover the range of -Vcc to Vcc ' , 
    Isn't it suppose to be -Vcc to 2*Vcc ? 


* This response also covers 9. 


* No, the minimum range is intended to be -vcc to vcc.  The Power 
Clamp covers from vcc to 2vcc.  When this minimum range was 
established, most Inputs were at negligle current at Vcc and the 
slope (current vs voltage) was also nearly 0.  So concatenation 
of the tables produced the same effect as extrapolation. 


* It is allowed to extend the clamp ranges beyond the specified 
range.  In some cases you should do so, especially if you are 
including the effect of an internal terminator.  In such cases, 
the conditions above are not met, and I prefer -vcc to 2vcc for 
both clamp tables.  Care must be taken so that 
currents are not double counted.  However, for many situations, 
the "minimal" IBIS guidelines are sufficient. 


8. In 'pulldn' paragraph it is written 'If the buffer is a 3-state 
device then first subtract the ground clamp current 
    from the pulldown current then enter the result into the [pulldown] 
table' , 
    first , it is written above the graph 'Pullup I/V curve after 
subtraction of ground clamp currents' Which is probably mistake. 
    second , Should I replace the pulldn results in Ibis model file 
after the subtraction? 


* What is entered in the [Pulldown] table is the result after 
subtraction. 


9. In 'Power Clamp' It is written that 'the data in the table must cover 
the range of vcc to vcc*2' , 
    Isn't the range suppose to be -Vcc to 2*Vcc ? 


* See 7 above. 


-- 
With regards, 
Yoked. 
_____________________________________ 
E-mail:       yokede@msil.sps.mot.com 
Tel: 972-9-9522482 Fax: 972-9-9522888 
WIRELESS     CIRCUIT  - IO      GROUP 
MOTOROLA     SEMICONDUCTOR     ISRAEL

-- 



With regards,



Yoked.



_____________________________________

E-mail:           yokede@motorola.com

Tel: 972-9-9522482 Fax: 972-9-9522888

WIRELESS     CIRCUIT  - IO      GROUP                 

MOTOROLA     SEMICONDUCTOR     ISRAEL
  


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<DIV><FONT color=#0000ff face=Arial size=2><SPAN class=816272518-21082001>Hi 
Yoked:</SPAN></FONT></DIV>
<DIV><FONT color=#0000ff face=Arial size=2><SPAN 
class=816272518-21082001></SPAN></FONT>&nbsp;</DIV>
<DIV><FONT color=#0000ff face=Arial size=2><SPAN 
class=816272518-21082001>&nbsp;&nbsp;Regarding the non-monotonic warnings, I 
would still check the line number on the pulldown curves and verify what is 
causing the non-monotonic warning.&nbsp; It should be the area where&nbsp;ground 
clamp current was subtracted from the total pulldown current and not somewhere 
else.</SPAN></FONT></DIV>
<DIV><FONT color=#0000ff face=Arial size=2><SPAN class=816272518-21082001>&nbsp; 
By the way, when creating a model for a non-tristatable output&nbsp;(i.e. one in 
which either the pullup or pulldown curves are always on) one does not have to 
subtract ground and power clamp current from the curves.&nbsp; In this case the 
warning should not occur.</SPAN></FONT></DIV>
<DIV><FONT color=#0000ff face=Arial size=2><SPAN 
class=816272518-21082001></SPAN></FONT>&nbsp;</DIV>
<DIV><FONT color=#0000ff face=Arial size=2><SPAN class=816272518-21082001>&nbsp; 
Regards,</SPAN></FONT></DIV>
<DIV><FONT color=#0000ff face=Arial size=2><SPAN class=816272518-21082001>&nbsp; 
Stephen Peters</SPAN></FONT></DIV>
<DIV><FONT color=#0000ff face=Arial size=2><SPAN class=816272518-21082001>&nbsp; 
Intel Corp.</SPAN></FONT></DIV>
<DIV><FONT color=#0000ff face=Arial size=2><SPAN 
class=816272518-21082001></SPAN></FONT>&nbsp;</DIV>
<BLOCKQUOTE>
  <DIV align=left class=OutlookMessageHeader dir=ltr><FONT face=Tahoma 
  size=2>-----Original Message-----<BR><B>From:</B> yoked erlich 
  [mailto:yokede@motorola.com]<BR><B>Sent:</B> Tuesday, August 21, 2001 7:40 
  AM<BR><B>To:</B> Ross, Bob; ibis-users@eda.org; stephen.peters@intel.com; 
  ibis@eda.org; Sergey Sofer (r53493)<BR><B>Cc:</B> Lior Aviv<BR><B>Subject:</B> 
  Re: IBIS - I/O Buffer Modeling Cookbook<BR><BR></DIV></FONT>Hi , 
  <P>There are another few questions about ibischk3 results: 
  <P>1. I've got the next warning: <BR><FONT color=#ff0000>&nbsp;WARNING - 
  [Model] iovb has no description of the buffer's high state</FONT> <BR><FONT 
  color=#ff0000>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 
  DC drive characteristics (no [Pullup] table).&nbsp; This warning</FONT> 
  <BR><FONT 
  color=#ff0000>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 
  can be silenced by changing the Model_type or by adding a</FONT> <BR><FONT 
  color=#ff0000>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 
  [Pullup] table.</FONT> <BR>This cell ('iovb') is 'Open_drain' type which 
  according to Ibis maker cook book do not <BR>suppose to have [Pullup] table , 
  only the [pulldown],[gnd_clamp] and [power_clamp] tables , <BR>What do you 
  think might be the reason of this error ?. 
  <P>2. I've got the next warning: <BR><FONT color=#ff0000>WARNING (line&nbsp; 
  427) - Pulldown Typical data is non-monotonic</FONT> <BR><FONT 
  color=#ff0000>WARNING (line&nbsp; 427) - Pulldown Maximum data is 
  non-monotonic</FONT> <BR><FONT color=#ff0000>WARNING (line&nbsp; 428) - 
  Pulldown Minimum data is non-monotonic</FONT> <BR>according to pulldn 
  subtraction gnd_clamp cookbook and standard instructions , <BR>it is 
  impossible to get monotonic data. <BR>It is even mentioned in the standard 
  that the [pulldn] or&nbsp; [pullup] tables might be non-monotonic. <BR>Is it 
  all right to ignore this warning ? 
  <P>With regards 
  <P>Yoked. <BR>"Ross, Bob" wrote: 
  <BLOCKQUOTE TYPE="CITE">Hello Yoked: 
    <P>We are temporarily having reflector e-mail problems, <BR>so you message 
    did not get sent to the general list. 
    <P>However, I am responding on the ibis-users reflector <BR>and copying 
    Stephen Peters, who authored the Cookbook. <BR>My responses are in your text 
    noted by "*" marks.&nbsp; These <BR>are brief responses without looking at 
    the Cookbook <BR>document.&nbsp; I am trying to convey what was intended, 
    <BR>not any editorial issues regarding how it is documented. 
    <P>Bob Ross <BR>Mentor Graphics 
    <P>--------------------- 
    <P>Subject: I/O buffer modeling cookbook <BR>From: Yoked Erlich (r58559) 
    (r58559@email.sps.mot.com) <BR>Date: Sun Aug 12 2001 - 04:18:21 PDT 
    <P>Hi , 
    <P>I would like to ask some questions about the 'I/O buffer modeling 
    <BR>cookbook' <BR>paper (revision 2.0X) , Which I've got from 'www.eig.org' 
    web site. 
    <P>1. Is there anywhere I can find revision 3.2 cookbook? 
    <P>* No, a Version 3.2 Cookbook has not been written.&nbsp; Cookbook 2 was 
    <BR>intended to cover Version 3.2 features, but we never got that far. 
    <P>2. I've an I/O buffer model which working in some chip pads as I/O , 
    <BR>some pads as steady input and some pads as steady output. 
    <BR>&nbsp;&nbsp;&nbsp; I would like to know if the buffer grouping is made 
    by the buffer <BR>type or by the pad direction? <BR>&nbsp;&nbsp;&nbsp; If 
    buffer type is the answer so one model with I/O type in enough <BR>for this 
    buffer, <BR>&nbsp;&nbsp;&nbsp; If pad direction is the answer so three model 
    is needed for this <BR>buffer , I/O model , Input model and Output model 
    <BR>&nbsp;&nbsp;&nbsp; ( in this case Input and Output model tests will be 
    exactly the same <BR>as I/O model ) . 
    <P>* If the buffer is truely an I/O, then it should be provided and 
    <BR>documented as I/O.&nbsp; A user might have additional knowledge that 
    <BR>certain I/O buffers are configured only as Input or Output buffers. 
    <BR>It would be permissible to modify that instance of the model and 
    <BR>just change the Model_type.&nbsp; That would help the EDA tool do 
    <BR>only the simulations that are relevant for the design. 
    <P>3-6 questions are about 'Extracting Data for the [Ramp] keyword' 
    <BR>paragraph in the cookbook : <BR>3. It is written that 'if the device 
    does not have enough <BR>&nbsp;&nbsp;&nbsp;&nbsp; drive capability to make a 
    significant output transition than a <BR>higher load may be used' , 
    <BR>&nbsp;&nbsp;&nbsp;&nbsp; How much is significant output transition ? 
    <P>* I do not have any hard guideline.&nbsp; I prefer impedances in the 
    <BR>order of magnitude of transmission line loads since that is a 
    <BR>typical high-speed design application.&nbsp; That ususally captures 
    <BR>a fast edge that would be seen with a PCB interconnect. 
    <P>* This makes no sense for certain weak buffers which would <BR>require 
    multiple reflections to change from one state to the <BR>other for an open 
    line.&nbsp; If the application is not high-speed, <BR>then it does not 
    manner.&nbsp;&nbsp; I would guess that a higher value <BR>load might be OK 
    for a driver source impedance &gt; 300 ohms. <BR>Others might have different 
    ideas. 
    <P>4. it is written that ' For an open drain , measure the rise and fall 
    <BR>time into the load resistor and voltage used <BR>&nbsp;&nbsp;&nbsp; by 
    the manufacture when specifying propagation delays' , This <BR>sentence is 
    not clear <BR>&nbsp;&nbsp;&nbsp; what is the test structure in open drain 
    buffer case?. 
    <P>* This is ambiguous.&nbsp; I prefer low impedance (50 ohm) pullups to 
    <BR>capture a faster edge.&nbsp; This may be in the order of magnitude of 
    <BR>the load seen during the intial part of the transition when the 
    <BR>device is connected through a PCB interconnect. 
    <P>5. it is written that ' Falling edge ramp data is captured with the load 
    <BR>resistor tied to VCC' <BR>&nbsp;&nbsp;&nbsp; , Is VCC mean the pmos 
    Driver source voltage (pad voltage) or low <BR>voltage? 
    <P>* This means that one end of the load resistor is connected to <BR>Vcc, 
    and the other end is connected to the output pad. 
    <P>6. It is written that 'simulations are performed with C_comp included in 
    <BR>the circuit' , This sentence is not clear. <BR>&nbsp;&nbsp;&nbsp; As I 
    understood C_comp is the capacitance seen when looking from the <BR>pad back 
    into the buffer , <BR>&nbsp;&nbsp;&nbsp; It is written that C_comp should be 
    added to the simulation , but <BR>C_comp is not a capacitor it is 
    capacitance measurement. 
    <P>* It is difficult to de-embed the die capacitance information from a 
    <BR>Spice net list (since some of the contribution is due to paramaters 
    <BR>within the transistor/diode models) or from a real physical 
    measurements. 
    <P>* So the intent is to clarify that the die capacitance is already 
    <BR>included in any waveform extraction.&nbsp; Since C_comp is a first order 
    <BR>approximation of the die capacitance, its effects should be included 
    <BR>in an EDA tool simulation.&nbsp; I have not looked at the specific 
    <BR>wording, but I assume this is confusing. 
    <P>7. In 'Ground Clamp' paragraph it is written that 'The data in table 
    <BR>must cover the range of -Vcc to Vcc ' , <BR>&nbsp;&nbsp;&nbsp; Isn't it 
    suppose to be -Vcc to 2*Vcc ? 
    <P>* This response also covers 9. 
    <P>* No, the minimum range is intended to be -vcc to vcc.&nbsp; The Power 
    <BR>Clamp covers from vcc to 2vcc.&nbsp; When this minimum range was 
    <BR>established, most Inputs were at negligle current at Vcc and the 
    <BR>slope (current vs voltage) was also nearly 0.&nbsp; So concatenation 
    <BR>of the tables produced the same effect as extrapolation. 
    <P>* It is allowed to extend the clamp ranges beyond the specified 
    <BR>range.&nbsp; In some cases you should do so, especially if you are 
    <BR>including the effect of an internal terminator.&nbsp; In such cases, 
    <BR>the conditions above are not met, and I prefer -vcc to 2vcc for <BR>both 
    clamp tables.&nbsp; Care must be taken so that <BR>currents are not double 
    counted.&nbsp; However, for many situations, <BR>the "minimal" IBIS 
    guidelines are sufficient. 
    <P>8. In 'pulldn' paragraph it is written 'If the buffer is a 3-state 
    <BR>device then first subtract the ground clamp current 
    <BR>&nbsp;&nbsp;&nbsp; from the pulldown current then enter the result into 
    the [pulldown] <BR>table' , <BR>&nbsp;&nbsp;&nbsp; first , it is written 
    above the graph 'Pullup I/V curve after <BR>subtraction of ground clamp 
    currents' Which is probably mistake. <BR>&nbsp;&nbsp;&nbsp; second , Should 
    I replace the pulldn results in Ibis model file <BR>after the subtraction? 
    <P>* What is entered in the [Pulldown] table is the result after 
    <BR>subtraction. 
    <P>9. In 'Power Clamp' It is written that 'the data in the table must cover 
    <BR>the range of vcc to vcc*2' , <BR>&nbsp;&nbsp;&nbsp; Isn't the range 
    suppose to be -Vcc to 2*Vcc ? 
    <P>* See 7 above. 
    <P>-- <BR>With regards, <BR>Yoked. <BR>_____________________________________ 
    <BR>E-mail:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; yokede@msil.sps.mot.com 
    <BR>Tel: 972-9-9522482 Fax: 972-9-9522888 
    <BR>WIRELESS&nbsp;&nbsp;&nbsp;&nbsp; CIRCUIT&nbsp; - 
    IO&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; GROUP <BR>MOTOROLA&nbsp;&nbsp;&nbsp;&nbsp; 
    SEMICONDUCTOR&nbsp;&nbsp;&nbsp;&nbsp; ISRAEL</P></BLOCKQUOTE><PRE>--&nbsp;

With regards,

Yoked.

_____________________________________
E-mail:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; yokede@motorola.com
Tel: 972-9-9522482 Fax: 972-9-9522888
WIRELESS&nbsp;&nbsp;&nbsp;&nbsp; CIRCUIT&nbsp; - IO&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; GROUP&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
MOTOROLA&nbsp;&nbsp;&nbsp;&nbsp; SEMICONDUCTOR&nbsp;&nbsp;&nbsp;&nbsp; ISRAEL</PRE>&nbsp; 
</BLOCKQUOTE></BODY></HTML>

------_=_NextPart_001_01C12A70.90BFD7C0--

 
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From: "Hirut Asfaw" <hasf@us.ibm.com>
Date: Wed, 22 Aug 2001 17:56:39 -0400
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Hi all,
     Can anyone explain to me the real purpose of Dynamic Power/Gnd Clamp,
which is in addition to the Power/Gnd Clamp tables included in an IBIS
models.

Thanks,
Hirut

Hirut Asfaw
ASIC I/O Developement
IBM Microelectronics Division
External:  (802) 769-0652   T/L: 6-0652
hasf@us.ibm.com



 
From owner-ibis Thu Aug 23 06:40:40 2001
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From: Henry.Piedel@infineon.com
To: ibis-users@eda.org
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Hello,

Can anyone give me their experiences with using IBIS modelling for a PECL differential pair with AC Coupling? 
(@ up to 1.5 GHz). Does it work - can / should it be done?

Thanks.

Henry Piedel

Infineon Technologies AG

Applications Engineer
COM FO D E
Tel.: +49 (0)30 386-36021
Fax: +49 (0)30 386-24939
henry.piedel@infineon.com

***** VISIT US AT: http://www.infineon.com/ *****


 
From owner-ibis Mon Aug 27 12:24:01 2001
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> ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

> -------------------------------------------------------

> IBIS SUMMIT

>         FIRST CALL FOR

>                 PARTICIPATION,

>                         PRESENTATIONS

>                                 & SPONSORSHIP!!!!

> -------------------------------------------------------

> ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

> 

>              I B I S   S U M M I T   M E E T I N G

> 

> Time/Date:      8:30 AM - 5:00 PM, Thursday, September 13, 2001

> 

> Location:       The Crowne Plaza Hotel

>                 10 Lincoln Square

>                 Worcester, MA

>                 Tel:  (508) 791-1600

>                 Fax:  (508) 791-1796

> 

> Content:        Presentations and Discussions

> 

> Purpose:        Solicit and Exchange IBIS Model Related Information and

Ideas.

> 

> Sponsors:       North East Systems Associates, Inc. (NESA),

>                 IBIS Users Group

>                 Others to be determined

>                 WE ARE LOOKING FOR ADDITIONAL SPONSORS!

>                   (contact Kathy Breda, breda@nesa.com

>                   or Bob Ross, bob_ross@mentor.com)

> 

> PCB Conference: September 10-14, 2001

> East            Worcester's Centrum Centre

>                 Worcester, Massachusetts

>                 See http://www.pcbeast.com/ for more information.

> 

> BACKGROUND

> 

> The IBIS Users Group (IBIS East) has been formed under the leadership of

> Dr. Edward Sayre from North East Systems Associates, Inc. (NESA) and has

> been meeting to consider and forward IBIS model user concerns.  As a

result

> of East coast meetings, the group has developed an IBIS Accuracy Handbook

> document and has initiated the project to format Connector Models.  These

> topics plus others of current interest to the EIA IBIS Open Forum will be

> discussed at this meeting.

> 

> This meeting will be conducted as a formal IBIS Summit Meeting.

Presentation

> are expected to be available and archived in an electronic format, and

minutes

> of the meeting will be issued.  Any pending formal decisions (votes) will

be

> announced at least two weeks prior to the meeting.

> 

> CALL FOR PARTICIPANTS

> 

> People involved in IBIS Model development, EDA tool development, and

digital

> circuit design are invited to participate to the Summit meeting.  If you

plan

> to participate, please register with the information below:

> 

>   Name:

>   E-mail address:

>   Company:

>   Telephone:

> 

> Send to:

> 

>   Kathy Breda (breda@nesa.com)

> 

> 

> CALL FOR PRESENTATIONS

> 

> We are seeking presentations from individuals who have IBIS experiences

> or issues.

> 

> Format of Presentation:  Overhead Projections

> Time:                    15-30 Minutes

> Electronic Archival:     We request electronic versions so that the

>                          presentations can be archived and also made

>                          available to non-attendees.  Formats used in

>                          the past have been text, Power Point, Word,

>                          Postscript, and Acrobat.  Electronic

presentations

>                          should be made available by September 7, 2001.

>                          Otherwise the presenter will be expected to

provide

>                          up to 50 copies for distribution.

> 

> If you plan a presentation, please supply

> 

>   Title:

>   Presenter:

>   E-mail address:

>   Company:

>   Telephone:

> 

>   Estimate Time:

> 

> Send this to:

> 

>   Kathy Breda (breda@nesa.com)

> 

> AGENDA

> 

> The agenda includes presentations, discussions, breaks, and a luncheon

(which

> will be provided).  This will be developed as presentation proposals are

> received.  So far the following presentatation is planned:

> 

>   "A Proposal for s2ibis3", Michael Steer, North Carolina State University

> 

>   "Modeling the Radiated Emission of Micro-controllers", Etienne Sicard,

>   National Institute of Applied Science (INSA/DEIG), France

> 

>   Plus IBIS Macro Language and demonstration, IBIS Connector

Specification,

>   and other IBIS issues.

> 

> LIST OF NEARBY HOTELS

> 

> See http://www.pcbeast.com for travel directions, hotels and other

> information.

> 

> **************************************************************




<bold><color><param>0000,0000,8080</param><bigger>


</bigger></color></bold><excerpt>


<center>_____________________________________________________________________________________________________


</center>


<center>Kathy Breda  | Director of Marketing

North East Systems Associates, Inc.  |  5 LAN Drive, Suite 200  |
Westford, MA 01886 


[T]  978-392-8787      [F]  978-392-8686    [W] www.nesa.com 




</center></excerpt>
 
From owner-ibis Mon Aug 27 14:51:41 2001
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From: "Muranyi, Arpad" <arpad.muranyi@intel.com>
To: ibis-users@eda.org
Subject: RE:  Purpose of dynamic clamps
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Hirut,

Here at Intel we came up with some clamping mechanisms
that reduce over/undershoot, consequently ringback by
bringing the knee voltage of the clamping device closer
to the rail voltage, or the signal levels.  The problem
is that the knee of the I-V curves is never perfectly
sharp, there is some rounding.  Due to this rounding one
can either not clamp well, or will have to put up with
some leakage during the steady state portions of the
signal.  To reduce this DC current flow (and power
consumption), we came up with some clamping ideas where
the knee voltage is moved dynamically.  Unfortunately
I can't tell you much more about this unless I let them
chop my head off, because there are some proprietary
ideas involved.

I hope this gives you some insight to what these dynamic
clamps are used for.

Arpad Muranyi
Intel Corporation
===========================================================

-----Original Message-----
From: Hirut Asfaw [mailto:hasf@us.ibm.com]
Sent: Wednesday, August 22, 2001 2:57 PM
To: ibis-users@eda.org
Subject: 


Hi all,
     Can anyone explain to me the real purpose of Dynamic Power/Gnd Clamp,
which is in addition to the Power/Gnd Clamp tables included in an IBIS
models.

Thanks,
Hirut

Hirut Asfaw
ASIC I/O Developement
IBM Microelectronics Division
External:  (802) 769-0652   T/L: 6-0652
hasf@us.ibm.com



 
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Message-ID: <3B8BBA5F.DCFA51D@mentor.com>
From: "Ross, Bob" <bob_ross@mentorg.com>
To: ibis@eda.org, ibis-users@eda.org
Subject: IBIS SUMMIT THIRD CALL REMINDER
Date: Tue, 28 Aug 2001 08:35:59 -0700
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To All:

Here is an updated reminder with more presentation
detail.

Bob Ross
Mentor Graphics


~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~  
-------------------------------------------------------  
IBIS SUMMIT   
        THIRD CALL FOR   
                PARTICIPATION &  
                        PRESENTATIONS!!!   
-------------------------------------------------------  
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~  

             I B I S   S U M M I T   M E E T I N G  

Time/Date:   8:30 AM - 5:00 PM, Thursday, September 13, 2001  

Location:    The Crowne Plaza Hotel  
             10 Lincoln Square  
             Worcester, MA  
             Tel:  (508) 791-1600  
             Fax:  (508) 791-1796  
                 
Content:     Presentations and Discussions  

Purpose:     Solicit and Exchange IBIS Model Related Information and Ideas.


Sponsors:    North East Systems Associates, Inc. (NESA),  
             IBIS Users Group
             Mentor Graphics
             IBIS Open Forum
             WE ARE LOOKING FOR ADDITIONAL SPONSORS!  
                  (contact Kathy Breda, breda@nesa.com  
                  or Bob Ross, bob_ross@mentor.com)  

PCB Conference: September 10-14, 2001  
East            Worcester's Centrum Centre  
                Worcester, Massachusetts  
                See http://www.pcbeast.com/ for more information.  

BACKGROUND  

The IBIS Users Group (IBIS East) has been formed under the leadership of    
Dr. Edward Sayre from North East Systems Associates, Inc. (NESA) and has  
been meeting to consider and forward IBIS model user concerns.  As a result

of East coast meetings, the group has developed an IBIS Accuracy Handbook  
document and has initiated the project to format Connector Models.  These  
topics plus others of current interest to the EIA IBIS Open Forum will be  
discussed at this meeting.  

This meeting will be conducted as a formal IBIS Summit Meeting.
Presentation  
are expected to be available and archived in an electronic format, and
minutes  
of the meeting will be issued.  Any pending formal decisions (votes) will be

announced at least two weeks prior to the meeting.  


CALL FOR PARTICIPANTS  

People involved in IBIS Model development, EDA tool development, and digital

circuit design are invited to participate to the Summit meeting.  If you
plan  
to participate, please register with the information below:  

  Name:  
  E-mail address:  
  Company:  
  Telephone:  

Send to:  

  Kathy Breda (breda@nesa.com)  
    

CALL FOR PRESENTATIONS  

We are seeking presentations from individuals who have IBIS experiences  
or issues.  

Format of Presentation:  Overhead Projections  
Time:                    15-30 Minutes  
Electronic Archival:     We request electronic versions so that the  
                         presentations can be archived and also made  
                         available to non-attendees.  Formats used in  
                         the past have been text, Power Point, Word,   
                         Postscript, and Acrobat.  Electronic presentations

                         should be made available by September 7, 2001.  
                         Otherwise the presenter will be expected to provide

                         up to 50 copies for distribution.  


If you plan a presentation, please supply  

  Title:  
  Presenter:  
  E-mail address:  
  Company:  
  Telephone:  

  Estimate Time:  

Send this to:  

  Kathy Breda (breda@nesa.com)  


AGENDA  

The agenda includes presentations, discussions, breaks, and a luncheon
(which  
will be provided).  This will be developed as presentation proposals are  
received.  So far the following presentations are planned:  
    
  "A Proposal for s2ibis3", Michael Steer, North Carolina State University  

  "Modeling the Radiated Emission of Micro-controllers", Etienne Sicard,  
  National Institute of Applied Science (INSA/DEIG), France  

  "Power/Ground Simulation with IBIS Models and Pin Mapping Issues",  
  Raj Raghuram, Sigrity, Inc.  

  "From Model Creator to Model User", Bob Haller, Cereva  

  Plus IBIS Macro Language and demonstration, IBIS Connector Specification,

  and other IBIS issues.  

LIST OF NEARBY HOTELS  

See http://www.pcbeast.com for travel directions, hotels and other  
information.  

**************************************************************

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<TITLE>IBIS SUMMIT THIRD CALL REMINDER</TITLE>
</HEAD>
<BODY>

<P><FONT SIZE=3D2>To All:</FONT>
</P>

<P><FONT SIZE=3D2>Here is an updated reminder with more =
presentation</FONT>
<BR><FONT SIZE=3D2>detail.</FONT>
</P>

<P><FONT SIZE=3D2>Bob Ross</FONT>
<BR><FONT SIZE=3D2>Mentor Graphics</FONT>
</P>
<BR>

<P><FONT =
SIZE=3D2>~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~&nbsp; =
</FONT>
<BR><FONT =
SIZE=3D2>-------------------------------------------------------&nbsp; =
</FONT>
<BR><FONT SIZE=3D2>IBIS SUMMIT&nbsp;&nbsp; </FONT>
<BR><FONT SIZE=3D2>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; THIRD =
CALL FOR&nbsp;&nbsp; </FONT>
<BR><FONT =
SIZE=3D2>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nb=
sp;&nbsp;&nbsp;&nbsp;&nbsp; PARTICIPATION &amp;&nbsp; </FONT>
<BR><FONT =
SIZE=3D2>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nb=
sp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nb=
sp; PRESENTATIONS!!!&nbsp;&nbsp; </FONT>
<BR><FONT =
SIZE=3D2>-------------------------------------------------------&nbsp; =
</FONT>
<BR><FONT =
SIZE=3D2>~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~&nbsp; =
</FONT>
</P>

<P><FONT =
SIZE=3D2>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nb=
sp;&nbsp; I B I S&nbsp;&nbsp; S U M M I T&nbsp;&nbsp; M E E T I N =
G&nbsp; </FONT>
</P>

<P><FONT SIZE=3D2>Time/Date:&nbsp;&nbsp; 8:30 AM - 5:00 PM, Thursday, =
September 13, 2001&nbsp; </FONT>
</P>

<P><FONT SIZE=3D2>Location:&nbsp;&nbsp;&nbsp; The Crowne Plaza =
Hotel&nbsp; </FONT>
<BR><FONT =
SIZE=3D2>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nb=
sp;&nbsp; 10 Lincoln Square&nbsp; </FONT>
<BR><FONT =
SIZE=3D2>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nb=
sp;&nbsp; Worcester, MA&nbsp; </FONT>
<BR><FONT =
SIZE=3D2>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nb=
sp;&nbsp; Tel:&nbsp; (508) 791-1600&nbsp; </FONT>
<BR><FONT =
SIZE=3D2>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nb=
sp;&nbsp; Fax:&nbsp; (508) 791-1796&nbsp; </FONT>
<BR><FONT =
SIZE=3D2>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nb=
sp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; </FONT>
<BR><FONT SIZE=3D2>Content:&nbsp;&nbsp;&nbsp;&nbsp; Presentations and =
Discussions&nbsp; </FONT>
</P>

<P><FONT SIZE=3D2>Purpose:&nbsp;&nbsp;&nbsp;&nbsp; Solicit and Exchange =
IBIS Model Related Information and Ideas.&nbsp; </FONT>
</P>

<P><FONT SIZE=3D2>Sponsors:&nbsp;&nbsp;&nbsp; North East Systems =
Associates, Inc. (NESA),&nbsp; </FONT>
<BR><FONT =
SIZE=3D2>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nb=
sp;&nbsp; IBIS Users Group</FONT>
<BR><FONT =
SIZE=3D2>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nb=
sp;&nbsp; Mentor Graphics</FONT>
<BR><FONT =
SIZE=3D2>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nb=
sp;&nbsp; IBIS Open Forum</FONT>
<BR><FONT =
SIZE=3D2>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nb=
sp;&nbsp; WE ARE LOOKING FOR ADDITIONAL SPONSORS!&nbsp; </FONT>
<BR><FONT =
SIZE=3D2>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nb=
sp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; (contact Kathy Breda, =
breda@nesa.com&nbsp; </FONT>
<BR><FONT =
SIZE=3D2>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nb=
sp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; or Bob Ross, =
bob_ross@mentor.com)&nbsp; </FONT>
</P>

<P><FONT SIZE=3D2>PCB Conference: September 10-14, 2001&nbsp; </FONT>
<BR><FONT =
SIZE=3D2>East&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp=
;&nbsp; Worcester's Centrum Centre&nbsp; </FONT>
<BR><FONT =
SIZE=3D2>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nb=
sp;&nbsp;&nbsp;&nbsp;&nbsp; Worcester, Massachusetts&nbsp; </FONT>
<BR><FONT =
SIZE=3D2>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nb=
sp;&nbsp;&nbsp;&nbsp;&nbsp; See <A HREF=3D"http://www.pcbeast.com/" =
TARGET=3D"_blank">http://www.pcbeast.com/</A> for more =
information.&nbsp; </FONT>
</P>

<P><FONT SIZE=3D2>BACKGROUND&nbsp; </FONT>
</P>

<P><FONT SIZE=3D2>The IBIS Users Group (IBIS East) has been formed =
under the leadership of&nbsp;&nbsp;&nbsp; </FONT>
<BR><FONT SIZE=3D2>Dr. Edward Sayre from North East Systems Associates, =
Inc. (NESA) and has&nbsp; </FONT>
<BR><FONT SIZE=3D2>been meeting to consider and forward IBIS model user =
concerns.&nbsp; As a result&nbsp; </FONT>
<BR><FONT SIZE=3D2>of East coast meetings, the group has developed an =
IBIS Accuracy Handbook&nbsp; </FONT>
<BR><FONT SIZE=3D2>document and has initiated the project to format =
Connector Models.&nbsp; These&nbsp; </FONT>
<BR><FONT SIZE=3D2>topics plus others of current interest to the EIA =
IBIS Open Forum will be&nbsp; </FONT>
<BR><FONT SIZE=3D2>discussed at this meeting.&nbsp; </FONT>
</P>

<P><FONT SIZE=3D2>This meeting will be conducted as a formal IBIS =
Summit Meeting.&nbsp; Presentation&nbsp; </FONT>
<BR><FONT SIZE=3D2>are expected to be available and archived in an =
electronic format, and minutes&nbsp; </FONT>
<BR><FONT SIZE=3D2>of the meeting will be issued.&nbsp; Any pending =
formal decisions (votes) will be&nbsp; </FONT>
<BR><FONT SIZE=3D2>announced at least two weeks prior to the =
meeting.&nbsp; </FONT>
</P>
<BR>

<P><FONT SIZE=3D2>CALL FOR PARTICIPANTS&nbsp; </FONT>
</P>

<P><FONT SIZE=3D2>People involved in IBIS Model development, EDA tool =
development, and digital&nbsp; </FONT>
<BR><FONT SIZE=3D2>circuit design are invited to participate to the =
Summit meeting.&nbsp; If you plan&nbsp; </FONT>
<BR><FONT SIZE=3D2>to participate, please register with the information =
below:&nbsp; </FONT>
</P>

<P><FONT SIZE=3D2>&nbsp; Name:&nbsp; </FONT>
<BR><FONT SIZE=3D2>&nbsp; E-mail address:&nbsp; </FONT>
<BR><FONT SIZE=3D2>&nbsp; Company:&nbsp; </FONT>
<BR><FONT SIZE=3D2>&nbsp; Telephone:&nbsp; </FONT>
</P>

<P><FONT SIZE=3D2>Send to:&nbsp; </FONT>
</P>

<P><FONT SIZE=3D2>&nbsp; Kathy Breda (breda@nesa.com)&nbsp; </FONT>
<BR><FONT SIZE=3D2>&nbsp;&nbsp;&nbsp; </FONT>
</P>

<P><FONT SIZE=3D2>CALL FOR PRESENTATIONS&nbsp; </FONT>
</P>

<P><FONT SIZE=3D2>We are seeking presentations from individuals who =
have IBIS experiences&nbsp; </FONT>
<BR><FONT SIZE=3D2>or issues.&nbsp; </FONT>
</P>

<P><FONT SIZE=3D2>Format of Presentation:&nbsp; Overhead =
Projections&nbsp; </FONT>
<BR><FONT =
SIZE=3D2>Time:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbs=
p;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 15-30 =
Minutes&nbsp; </FONT>
<BR><FONT SIZE=3D2>Electronic Archival:&nbsp;&nbsp;&nbsp;&nbsp; We =
request electronic versions so that the&nbsp; </FONT>
<BR><FONT =
SIZE=3D2>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nb=
sp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nb=
sp;&nbsp; presentations can be archived and also made&nbsp; </FONT>
<BR><FONT =
SIZE=3D2>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nb=
sp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nb=
sp;&nbsp; available to non-attendees.&nbsp; Formats used in&nbsp; =
</FONT>
<BR><FONT =
SIZE=3D2>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nb=
sp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nb=
sp;&nbsp; the past have been text, Power Point, Word,&nbsp;&nbsp; =
</FONT>
<BR><FONT =
SIZE=3D2>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nb=
sp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nb=
sp;&nbsp; Postscript, and Acrobat.&nbsp; Electronic presentations&nbsp; =
</FONT>
<BR><FONT =
SIZE=3D2>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nb=
sp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nb=
sp;&nbsp; should be made available by September 7, 2001.&nbsp; </FONT>
<BR><FONT =
SIZE=3D2>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nb=
sp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nb=
sp;&nbsp; Otherwise the presenter will be expected to provide&nbsp; =
</FONT>
<BR><FONT =
SIZE=3D2>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nb=
sp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nb=
sp;&nbsp; up to 50 copies for distribution.&nbsp; </FONT>
</P>
<BR>

<P><FONT SIZE=3D2>If you plan a presentation, please supply&nbsp; =
</FONT>
</P>

<P><FONT SIZE=3D2>&nbsp; Title:&nbsp; </FONT>
<BR><FONT SIZE=3D2>&nbsp; Presenter:&nbsp; </FONT>
<BR><FONT SIZE=3D2>&nbsp; E-mail address:&nbsp; </FONT>
<BR><FONT SIZE=3D2>&nbsp; Company:&nbsp; </FONT>
<BR><FONT SIZE=3D2>&nbsp; Telephone:&nbsp; </FONT>
</P>

<P><FONT SIZE=3D2>&nbsp; Estimate Time:&nbsp; </FONT>
</P>

<P><FONT SIZE=3D2>Send this to:&nbsp; </FONT>
</P>

<P><FONT SIZE=3D2>&nbsp; Kathy Breda (breda@nesa.com)&nbsp; </FONT>
</P>
<BR>

<P><FONT SIZE=3D2>AGENDA&nbsp; </FONT>
</P>

<P><FONT SIZE=3D2>The agenda includes presentations, discussions, =
breaks, and a luncheon (which&nbsp; </FONT>
<BR><FONT SIZE=3D2>will be provided).&nbsp; This will be developed as =
presentation proposals are&nbsp; </FONT>
<BR><FONT SIZE=3D2>received.&nbsp; So far the following presentations =
are planned:&nbsp; </FONT>
<BR><FONT SIZE=3D2>&nbsp;&nbsp;&nbsp; </FONT>
<BR><FONT SIZE=3D2>&nbsp; &quot;A Proposal for s2ibis3&quot;, Michael =
Steer, North Carolina State University&nbsp; </FONT>
</P>

<P><FONT SIZE=3D2>&nbsp; &quot;Modeling the Radiated Emission of =
Micro-controllers&quot;, Etienne Sicard,&nbsp; </FONT>
<BR><FONT SIZE=3D2>&nbsp; National Institute of Applied Science =
(INSA/DEIG), France&nbsp; </FONT>
</P>

<P><FONT SIZE=3D2>&nbsp; &quot;Power/Ground Simulation with IBIS Models =
and Pin Mapping Issues&quot;,&nbsp; </FONT>
<BR><FONT SIZE=3D2>&nbsp; Raj Raghuram, Sigrity, Inc.&nbsp; </FONT>
</P>

<P><FONT SIZE=3D2>&nbsp; &quot;From Model Creator to Model User&quot;, =
Bob Haller, Cereva&nbsp; </FONT>
</P>

<P><FONT SIZE=3D2>&nbsp; Plus IBIS Macro Language and demonstration, =
IBIS Connector Specification,&nbsp; </FONT>
<BR><FONT SIZE=3D2>&nbsp; and other IBIS issues.&nbsp; </FONT>
</P>

<P><FONT SIZE=3D2>LIST OF NEARBY HOTELS&nbsp; </FONT>
</P>

<P><FONT SIZE=3D2>See <A HREF=3D"http://www.pcbeast.com" =
TARGET=3D"_blank">http://www.pcbeast.com</A> for travel directions, =
hotels and other&nbsp; </FONT>
<BR><FONT SIZE=3D2>information.&nbsp; </FONT>
</P>

<P><FONT =
SIZE=3D2>**************************************************************<=
/FONT>
</P>

</BODY>
</HTML>
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