From owner-ibis Wed Jul 1 11:10:02 1998 Received: from calliope1.fm.intel.com (calliope1.fm.intel.com [132.233.247.10]) by server.eda.org (8.8.5/8.8.3) with ESMTP id LAA21909 for ; Wed, 1 Jul 1998 11:09:55 -0700 (PDT) Received: from fmsmsx27.fm.intel.com (fmsmsx27.fm.intel.com [132.233.42.27]) by calliope1.fm.intel.com (8.8.6/8.8.5) with ESMTP id SAA12197 for ; Wed, 1 Jul 1998 18:06:10 GMT Message-Id: <199807011806.SAA12197@calliope1.fm.intel.com> Received: by FMSMSX27 with Internet Mail Service (5.5.1960.3) id ; Wed, 1 Jul 1998 11:06:09 -0700 From: "Muranyi, Arpad" To: ibis@eda.org Subject: FET switch model for BX designs Date: Wed, 1 Jul 1998 10:35:00 -0700 MIME-Version: 1.0 X-Mailer: Internet Mail Service (5.5.1960.3) Content-Type: text/plain IBIS members, In the last Open Forum face-to-face meeting it was brought up that Intel's design guidelines for the BX chip recommended (required) the usage certain FET switches for which there were no IBIS models available. It was stated that designers could not simulate their designs because of that. I took an informal AR to check this situation out and found the following. (I am quoting from the EMAIL that was sent to me in response to my inquiry). Quote 1: ======== Some of the vendors are using Zeelan technology to develop ibis models for them. Fet vendors are also planning to provide these ibis models on their website. Meanwhile, if OEM's need models they can contact the vendors directly. Here is a list of vendor contacts: Pericom: Kay Annalmalai 408-435-0800 X279 IDT: Rick Walker 408-492-8319 TI: Nalan Yogasundram 903-868-7410 Quote 2: ======== ... Pericom ... they claim that Zeelan has built models for pericom parts and pericom will be happy to provide them to OEM's. Please inform the "people" of availability of pericom models and have them contact pericom directly. I hope this will help those simulations to get started. Sincerely, Arpad Muranyi Intel Corporation ============================================================================ ==== From owner-ibis Thu Jul 2 09:13:17 1998 Received: from mailext02.compaq.com (mailext02.compaq.com [207.18.199.33]) by server.eda.org (8.8.5/8.8.3) with SMTP id JAA24837 for ; Thu, 2 Jul 1998 09:13:16 -0700 (PDT) Received: from mail.compaq.com(really [207.18.199.34]) by mailext02.compaq.com via sendmail with smtp id for ; Thu, 2 Jul 1998 10:59:48 -0500 (CDT) (Smail-3.2.0.93 1997-Apr-12 #2 built 1997-Dec-21) Received: from lisbon.eng.hou.compaq.com(really [131.168.159.105]) by mail.compaq.com via sendmail with smtp id for ; Thu, 2 Jul 98 11:10:53 -0500 (CDT) (/\##/\ Smail3.1.30.16 #30.10 built 18-dec-97) Received: by lisbon.eng.hou.compaq.com (Smail3.1.26.7/COMPAQ-HESIOD) id m0yrlvZ-000KyfC; Thu, 2 Jul 98 11:09 CDT Message-Id: Date: Thu, 2 Jul 98 11:09 CDT From: beal@lisbon.eng.hou.compaq.com (Weston Beal) To: ibis@eda.org, arpad.muranyi@intel.com Subject: Re: FET switch model for BX designs Arpad, and others, I think that created a FET IBIS file is the easy part. The real problem that I see is that no simulator that I know of supports the FET specification in IBIS. Does anyone know of a simulator that supports FET behavioral models? I suppose you could do it is SPICE, but if you are using SPICE, you shouldn't have to use an IBIS file, right? Regards, Weston > From: "Muranyi, Arpad" > To: ibis@eda.org > Subject: FET switch model for BX designs > Date: Wed, 1 Jul 1998 10:35:00 -0700 > > IBIS members, > > In the last Open Forum face-to-face meeting it was brought up that Intel's > design guidelines for the BX chip recommended (required) the usage certain > FET > switches for which there were no IBIS models available. It was stated that > designers could not simulate their designs because of that. > > I took an informal AR to check this situation out and found the following. ... > Arpad Muranyi > Intel Corporation > ============================================================================ > ==== > From owner-ibis Thu Jul 2 10:00:59 1998 Received: from relayhost.vlsi.com (relayhost.vlsi.com [134.27.20.23]) by server.eda.org (8.8.5/8.8.3) with ESMTP id KAA25011 for ; Thu, 2 Jul 1998 10:00:59 -0700 (PDT) Received: (from smtp@localhost) by relayhost.vlsi.com (SMI-8.6/) id JAA23933 for ; Thu, 2 Jul 1998 09:56:54 -0700 Received: from (tem-pbx1.tempe.vlsi.com [134.27.128.26]) by osiris.vlsi.com via smap (V2.0) id xma023918; Thu, 2 Jul 98 09:56:27 -0700 Received: from vlsi.com (witsend.tempe.vlsi.com [134.27.133.12]) by tem-pbx1.tempe.vlsi.com with SMTP (Microsoft Exchange Internet Mail Service Version 5.5.1960.3) id 3B2QLM57; Thu, 2 Jul 1998 09:54:39 -0700 Sender: dsession@vlsi.com Message-ID: <359BBBBA.C1788430@vlsi.com> Date: Thu, 02 Jul 1998 09:56:26 -0700 From: "D. C. Sessions" Reply-To: ibis@eda.org Organization: VLSI Technology Inc. X-Mailer: Mozilla 4.05 [en] (X11; U; SunOS 5.5.1 sun4m) MIME-Version: 1.0 To: ibis@eda.org Subject: Re: FET switch model for BX designs References: Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Weston Beal wrote: > > Arpad, and others, > > I think that created a FET IBIS file is the easy part. The real > problem that I see is that no simulator that I know of supports the FET > specification in IBIS. Does anyone know of a simulator that supports > FET behavioral models? I suppose you could do it is SPICE, but if you > are using SPICE, you shouldn't have to use an IBIS file, right? Arpad didn't give the whole context. At the recent meeting, the point came up that there was no compelling reason for EDA companies *to* add 3.x support. The FET switch was the counter, since it's a key component in high-performance SDRAM applications. The EDA representatives then said that they needed to be able to point to models that *would* enable the analysis if only the tool support were there, so that the EDA company was the only obstacle to engineers' solution of a compelling real-world problem. With the standard ratified, the models in place, and the Intel 440BX application on PC motherboards, all of those ingredients are in place and our people at EDA companies now have the long-awaited compelling business case for version 3.x support. > > From: "Muranyi, Arpad" > > To: ibis@eda.org > > Subject: FET switch model for BX designs > > Date: Wed, 1 Jul 1998 10:35:00 -0700 > > > > IBIS members, > > > > In the last Open Forum face-to-face meeting it was brought up that Intel's > > design guidelines for the BX chip recommended (required) the usage certain > > FET > > switches for which there were no IBIS models available. It was stated that > > designers could not simulate their designs because of that. > > > > I took an informal AR to check this situation out and found the following. > > ... > > > Arpad Muranyi > > Intel Corporation > > ============================================================================ > > ==== > > -- D. C. Sessions dc.sessions@tempe.vlsi.com From owner-ibis Thu Jul 2 10:24:09 1998 Received: from relay1.UU.NET (relay1.UU.NET [192.48.96.5]) by server.eda.org (8.8.5/8.8.3) with ESMTP id KAA25039 for ; Thu, 2 Jul 1998 10:24:09 -0700 (PDT) Received: from uucp1.uu.net by relay1.UU.NET with SMTP (peer crosschecked as: uucp1.uu.net [192.48.96.81]) id QQewhx01434; Thu, 2 Jul 1998 13:20:32 -0400 (EDT) Received: from qdt.UUCP by uucp1.uu.net with UUCP/RMAIL ; Thu, 2 Jul 1998 13:20:33 -0400 Received: from viewlogic.com by qdt.viewlogic.com (4.1/SMI-4.1) id AA21984; Thu, 2 Jul 98 10:23:06 PDT Received: from f14 by qdt.com (4.1/SMI-4.1) id AA26831; Thu, 2 Jul 98 10:22:48 PDT Sender: crokusek@qdt.com Message-Id: <359BC031.6201DD56@viewlogic.com> Date: Thu, 02 Jul 1998 10:15:29 -0700 From: Chris Rokusek Organization: Viewlogic Systems X-Mailer: Mozilla 3.01 (X11; I; SunOS 4.1.4 sun4m) Mime-Version: 1.0 To: Weston Beal Cc: ibis@eda.org, arpad.muranyi@intel.com Subject: Re: FET switch model for BX designs References: Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Weston, Viewlogic's XTK supports the following IBIS V3.0 features in the upcoming 1998.1 release. Due to few available .ibs example files these items are identified as BETA features. 1) Series FET switch 2) EBD descriptions 3) T-LINE package model descriptions 4) Driver Scheduling Please respond to me with requests for additional 3.0 features you may require. Regards, Chris Rokusek Viewlogic Systems Weston Beal wrote: > > Arpad, and others, > > I think that created a FET IBIS file is the easy part. The real > problem that I see is that no simulator that I know of supports the FET > specification in IBIS. Does anyone know of a simulator that supports > FET behavioral models? I suppose you could do it is SPICE, but if you > are using SPICE, you shouldn't have to use an IBIS file, right? > > Regards, > Weston > > > From: "Muranyi, Arpad" > > To: ibis@eda.org > > Subject: FET switch model for BX designs > > Date: Wed, 1 Jul 1998 10:35:00 -0700 > > > > IBIS members, > > > > In the last Open Forum face-to-face meeting it was brought up that Intel's > > design guidelines for the BX chip recommended (required) the usage certain > > FET > > switches for which there were no IBIS models available. It was stated that > > designers could not simulate their designs because of that. > > > > I took an informal AR to check this situation out and found the following. > > ... > > > Arpad Muranyi > > Intel Corporation > > ============================================================================ > > ==== > > From owner-ibis Mon Jul 6 11:47:52 1998 Received: from ganymede.or.intel.com (ganymede.or.intel.com [134.134.248.3]) by server.eda.org (8.8.5/8.8.3) with ESMTP id LAA01946; Mon, 6 Jul 1998 11:47:51 -0700 (PDT) Received: from ichips-jf.jf.intel.com (ichips-jf.jf.intel.com [134.134.50.200]) by ganymede.or.intel.com (8.8.6/8.8.5) with ESMTP id SAA13769; Mon, 6 Jul 1998 18:44:17 GMT Received: from xtg801 (xtg801.pdx.intel.com [134.134.120.169]) by ichips-jf.jf.intel.com (8.8.8/8.8.7) with ESMTP id LAA12486; Mon, 6 Jul 1998 11:44:17 -0700 (PDT) Received: from ichips.intel.com by xtg801 (8.8.8/WW2.1 (Jones Farm)) id LAA12537; Mon, 6 Jul 1998 11:44:16 -0700 (PDT) Message-Id: <199807061844.LAA12537@xtg801> X-Mailer: exmh version 2.0delta 6/3/97 To: ibis@eda.org, ibis-users@eda.org Subject: IBIS version 3.1 out for review Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Date: Mon, 06 Jul 1998 11:44:15 -0700 From: Stephen Peters Hello All: The proposed version 3.1 of the EIA IBIS specification is now available for review. To obtain a copy, FTP to eda.org, go to the directory /pub/ibis/wip, then download the file ver3_1.ibs. This document contains the text of IBIS version 3.1 as will be voted on at the next IBIS open forum meeting on July 17th. All comments regarding the proposed specification should be directed to Stephen Peters (IBIS open forum Vice-chair) at sjpeters@ichips.intel.com. Best Regards, Stephen Peters Intel Corp. Vice-Chair, EIA IBIS Open Forum From owner-ibis Mon Jul 13 08:44:41 1998 Received: from hebe.or.intel.com (hebe.or.intel.com [134.134.248.4]) by server.eda.org (8.8.5/8.8.3) with ESMTP id IAA17810 for ; Mon, 13 Jul 1998 08:44:41 -0700 (PDT) Received: from ichips-jf.jf.intel.com (ichips-jf.jf.intel.com [134.134.50.200]) by hebe.or.intel.com (8.8.6/8.8.5) with ESMTP id IAA09516; Mon, 13 Jul 1998 08:47:18 -0700 (PDT) Received: from xtg801.pdx.intel.com (xtg801.pdx.intel.com [134.134.120.169]) by ichips-jf.jf.intel.com (8.8.8/8.8.7) with ESMTP id IAA08275; Mon, 13 Jul 1998 08:40:59 -0700 (PDT) Received: from ichips.intel.com by xtg801.pdx.intel.com (8.8.8/WW2.2 (Jones Farm)) id IAA07099; Mon, 13 Jul 1998 08:40:59 -0700 (PDT) Message-Id: <199807131540.IAA07099@xtg801.pdx.intel.com> X-Mailer: exmh version 2.0delta 6/3/97 To: ibis@eda.org cc: bob@scsi.com Subject: IBIS Open Forum Meeting Agenda 7/17 Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Date: Mon, 13 Jul 1998 08:40:58 -0700 From: Stephen Peters IBIS Open Forum Meeting Agenda for 7/17/98 Bridge Number Reservation # Passcode (916) 356-9200 6-57211 5683488 All meetings are 8:00 AM to 9:55 AM Pacific Time. When you call into the meeting, ask for the IBIS Open Forum hosted by Will Hobbs and give the Reservation Number and Passcode. Stephen Peters will conduct the meeting. 8:00 Check-In, Intros, Announcements Peters - Intros of New IBIS Participants, Meeting Quorum Peters - Membership Update and Treasurers Report Rusher - Review of Previous Meeting's Minutes (and ARs) Peters - Miscellany/Announcements All - Press & Web Page Updates Huq, All - New Models Available, Library Update Powell, All - Opens for New Issues All 8:25 Administrative and Project Discussions International/External Progress - IEC 62014-1 (IBIS Version 2.1) Rusher - pr EIAJ ED-5302 Standard for I/O Interface Model for Integrated Circuits (IMIC) Raghuram - 93/67/NP IBIS and EMC Simulation Perrin - JEDEC JC-16.2 Modeling and Testing Sessions IBIS (East) Users Group Meetings Edlund IBIS Summit Meeting at DAC Review Peters/Ross IBISCHK2+ (Ver 2.115) PROGRESS Flora/Rokusek Version 3.1 Parser Development Peters - Billing & Payment Cookbook Status Peters IBIS Model Review Committee Flora IEEE Standard Component Data Sheet Peters New Administrative Issues All 9:00 Technical Discussion VOTES ON THE SPECIFICATION AND PARSER RELEASE: VERSION 3.1 Peters - Editing Committee Review - List of Changes Peters - BIRD44 - Interpretation of Min/Max/Weak/Strong Data Peters - BIRD52 - [Driver Schedule] Clarifications Muranyi - VOTE All Members IBISCHK3 RELEASE Peters - REVIEW - Test and Samples Peters - VOTE All Members VOTES ON THE FOLLOWING BIRDS FOR VERSION 3.2: BIRD42.3 - Modeling Current Waveforms Kumar/Ross BIRD48.3 - Add Submodel Orhanovic/Muranyi/Ross BIRD49.2 - Add Submodel Dynamic Clamps Orhanovic/Muranyi/Ross BIRD50.2 - Add Submodel Bus Hold Orhanovic/Muranyi/Ross New Technical Issues All 9:50 Wrap Up and Next Meetings Plans Peters 9:55 Sign Off From owner-ibis Thu Jul 16 14:11:23 1998 Received: from newsgw.mentorg.com (newsgw.mentorg.com [192.94.38.66]) by server.eda.org (8.8.5/8.8.3) with ESMTP id OAA27960 for ; Thu, 16 Jul 1998 14:11:23 -0700 (PDT) Received: from emicx.wv.mentorg.com by newsgw.mentorg.com (8.8.8/CF5.40F) id OAA16311; Thu, 16 Jul 1998 14:07:13 -0700 (PDT) Received: from bob by emicx.wv.mentorg.com (8.7.5/CF5.38R) id OAA10047; Thu, 16 Jul 1998 14:07:12 -0700 (PDT) From: bobr@emicx.mentorg.com (Bob Ross) Received: by bob (4.1/CF5.23L) id AA05405; Thu, 16 Jul 98 14:07:06 PDT Date: Thu, 16 Jul 98 14:07:06 PDT Message-Id: <9807162107.AA05405@bob> To: ibis@eda.org Subject: Driver Schedule Sample To All: I have uploaded a sample file drivesch.ibs which demonstrates the [Driver Schedule] keyword. It is located in eda.org under /pub/ibis/samples/ver3.1. Bob Ross Interconnectix/Mentor Graphics From owner-ibis Fri Jul 17 18:02:18 1998 Received: from newsgw.mentorg.com (newsgw.mentorg.com [192.94.38.66]) by server.eda.org (8.8.5/8.8.3) with ESMTP id SAA00844 for ; Fri, 17 Jul 1998 18:02:17 -0700 (PDT) Received: from emicx.wv.mentorg.com by newsgw.mentorg.com (8.8.8/CF5.40F) id RAA25342; Fri, 17 Jul 1998 17:58:07 -0700 (PDT) Received: from bob by emicx.wv.mentorg.com (8.7.5/CF5.38R) id RAA22249; Fri, 17 Jul 1998 17:58:05 -0700 (PDT) From: bobr@emicx.mentorg.com (Bob Ross) Received: by bob (4.1/CF5.23L) id AA07707; Fri, 17 Jul 98 17:58:00 PDT Date: Fri, 17 Jul 98 17:58:00 PDT Message-Id: <9807180058.AA07707@bob> To: ibis@eda.org Subject: IBIS BIRD49.4 - Add Submodel Dynamic Clamp IBIS Folks: Per corrections made during the July 17, 1998 IBIS meeting, approved BIRD49.4 is issued. It deletes references to the clocked mode in the STATEMENT OF INTENT and corrects the [GND Pulse Table] and [POWER Pulse Table] examples where the data had mistakenly been commented out. All open BIRDs have been resolved at the July 17, 1998 IBIS meeting. Refer to eda.org under /pub/ibis/birds resolution of all BIRDs. Bob Ross Interconnectix/Mentor Graphics ****************************************************************************** ****************************************************************************** BIRD ID#: 49.4 ISSUE TITLE: Add Submodel Dynamic Clamps REQUESTER: Neven Orhanovic, Bob Ross, Mentor G., Arpad Muranyi, Intel DATE SUBMITTED: 4/2/98, 5/1/98, 5/21/98, 6/19/98, 7/17/98 DATE ACCEPTED BY IBIS OPEN FORUM: July 17, 1998 ****************************************************************************** ****************************************************************************** STATEMENT OF THE ISSUE: A novel type of termination technique is used in today's integrated circuits. The termination consists of a pair of built in dynamic clamps whose V-I curves change with time. The clamp is switched "on" when needed and switched "off" otherwise (to conserve power). When the clamp is switched "on" its V-I curve provides more clamping than a regular static clamp and when it is turned "off" it behaves like a normal clamp. The switching of the dynamic clamps can be triggered by an input signal crossing a triggering threshold. Another mode allows the additional clamp tables to be fixed. ****************************************************************************** STATEMENT OF THE RESOLVED SPECIFICATIONS: The dynamic clamp functionality is added in the new Section 6a discussion: | Dynamic Clamp: | | When the Submodel_type subparameter under the [Submodel] keyword is set to | Dynamic_clamp, the submodel describes the dynamic clamp functionality. | | The [GND Pulse Table] and [POWER Pulse Table] keywords are defined. An | example for a complete dynamic clamp model is provided. | |============================================================================= | Keyword: [GND Pulse Table], [POWER Pulse Table] | Required: No | Description: Used to specify the offset voltage versus time of [GND Clamp] | and [POWER Clamp] tables within submodels. | Usage Rules: Each [GND Pulse Table] and [POWER Pulse Table] keyword | introduces a table of time versus vs. points that describe | the shape of an offset voltage from the [GND Clamp Reference] | voltage (or default ground) or the [POWER Clamp Reference] | voltage (or default [Voltage Range] voltage). Note, these | voltage values are inherited from the top-level model. | | The table itself consists of one column of time points, then | three columns of voltage points in the standard typ, min, and | max format. The four entries must be placed on a single line | and must be separated by at least one white space or tab | character. All four columns are required. However, data is | only required in the typical column. If minimum or maximum | data is not available, use the reserved word "NA". Time | values must increase as one parses down the table. The | waveform table can contain of maximum of 100 data points. | | Each table must contain at least two entries. Thus, numerical | values are required for the first and last entries of any | column containing numerical data. | | The voltage entries in both the [Gnd Pulse Table] and [POWER | Pulse Table] tables are directly measured offsets. At each | instance, the [Gnd Pulse Table] voltage is ADDED to the [GND | Clamp] table voltages to provide the shifted table voltages. | At each instance, the [POWER Pulse Table] voltage is | SUBTRACTED (because of polarity conventions) from the [POWER | Clamp] table voltages to provide the shifted table voltages. | | Only one [GND Pulse Table] and one [POWER Pulse Table] are | allowed per model. | | The [GND Pulse Table] and [POWER Pulse Table] interact with | [Submodel Spec] subparameters V_trigger_f and V_trigger_r. | Several modes of operation exist based on whether a pulse | table and its corresponding trigger subparameter are given. | These modes are classified as triggered, clocked, and static. | | Triggered Mode: | | For triggered mode a pulse table must exist and include the | entire waveform; i.e., the first entry (or entries) in a | voltage column must be equal to the last entry. | | Also, a corresponding [Submodel Spec] V_trigger_* subparameter | must exist. The triggered interaction is described: | | The V_trigger_f subparameter under [Submodel Spec] is used | to detect when the falling edge waveform at the die passes | the trigger voltage. At that time the [Gnd Pulse Table] | operation starts. Similarily, the V_trigger_r subparameter is | used to detect when the rising edge waveform at the die passes | the trigger voltage. At that time [POWER Pulse Table] | operation starts. The [GND Pulse Table] dependency is shown | below: | | | Waveform at Die | | o o o o | o | o | o ------- | |o ^ | | o | V_trigger_f | | o v time | | o o--------------------> | | | | | | [GND Pulse Table] | | | | o o o o | | o o | | o o | | o o | | o o | | o o time | o o o o o o o o --------> | | ^ | |_ [GND Pulse Table] operation starts at this time | | The V_trigger_r and [POWER Pulse Table] operate in a similar manner. When | the V_trigger_r voltage value is reached on the rising edge, the [POWER | Pulse Table] is started. Normally the offset voltage entries in the [POWER | Pulse Table] are negative. | | Static Mode: | | When the [GND Pulse Table] keyword does not exist, but the added model | [GND Clamp] table does exist, the added model [GND Clamp] is used directly. | Similarly, when the [POWER Pulse Table] keyword does not exist, but the | added model [POWER Clamp] table does exist, the added model [POWER Clamp] | is used directly. | | This mode provides additional fixed clamping to an I/O_* buffer or a | 3-state buffer when it is used as a driver. |------------------------------------------------------------------------------ | | Example of Dynamic_clamp Model with both dynamic GND and POWER clamps: | [Submodel] Dynamic_Clamp_1 Submodel_type Dynamic_clamp | [Submodel Spec] | Subparameter typ min max | V_trigger_f 1.4 1.2 1.6 | Falling edge trigger V_trigger_r 3.6 2.9 4.3 | Rising edge trigger | | typ min max | [Voltage Range] 5.0 4.5 5.5 | Note, the actual voltage range and reference voltages are inherited from | the top-level model. | [GND Pulse Table] | GND Clamp offset table | Time V(typ) V(min) V(max) | 0 0 0 0 1e-9 0 0 0 2e-9 0.9 0.8 1.0 10e-9 0.9 0.8 1.0 11e-9 0 0 0 | [GND Clamp] | Table to be offset | | Voltage I(typ) I(min) I(max) | -5.000 -3.300e+01 -3.000e+01 -3.500e+01 -4.000 -2.300e+01 -2.200e+01 -2.400e+01 -3.000 -1.300e+01 -1.200e+01 -1.400e+01 -2.000 -3.000e+00 -2.300e+00 -3.700e+00 -1.900 -2.100e+00 -1.500e+00 -2.800e+00 -1.800 -1.300e+00 -8.600e-01 -1.900e+00 -1.700 -6.800e-01 -4.000e-01 -1.100e+00 -1.600 -2.800e-01 -1.800e-01 -5.100e-01 -1.500 -1.200e-01 -9.800e-02 -1.800e-01 -1.400 -7.500e-02 -7.100e-02 -8.300e-02 -1.300 -5.750e-02 -5.700e-02 -5.900e-02 -1.200 -4.600e-02 -4.650e-02 -4.550e-02 -1.100 -3.550e-02 -3.700e-02 -3.450e-02 -1.000 -2.650e-02 -2.850e-02 -2.500e-02 -0.900 -1.850e-02 -2.100e-02 -1.650e-02 -0.800 -1.200e-02 -1.400e-02 -9.750e-03 -0.700 -6.700e-03 -8.800e-03 -4.700e-03 -0.600 -3.000e-03 -4.650e-03 -1.600e-03 -0.500 -9.450e-04 -1.950e-03 -3.650e-04 -0.400 -5.700e-05 -2.700e-04 -5.550e-06 -0.300 -1.200e-06 -1.200e-05 -5.500e-08 -0.200 -3.000e-08 -5.000e-07 0.000e+00 -0.100 0.000e+00 0.000e+00 0.000e+00 0.000 0.000e+00 0.000e+00 0.000e+00 5.000 0.000e+00 0.000e+00 0.000e+00 | [POWER Pulse Table] | POWER Clamp offset table | | Time V(typ) V(min) V(max) | 0 0 0 0 1e-9 0 0 0 2e-9 -0.9 -1.0 -0.8 10e-9 -0.9 -1.0 -0.8 11e-9 0 0 0 | [POWER Clamp] | Table to be offset | | Voltage I(typ) I(min) I(max) | -5.000 1.150e+01 1.100e+01 1.150e+01 -4.000 7.800e+00 7.500e+00 8.150e+00 -3.000 4.350e+00 4.100e+00 4.700e+00 -2.000 1.100e+00 8.750e-01 1.300e+00 -1.900 8.000e-01 6.050e-01 1.000e+00 -1.800 5.300e-01 3.700e-01 7.250e-01 -1.700 2.900e-01 1.800e-01 4.500e-01 -1.600 1.200e-01 6.850e-02 2.200e-01 -1.500 3.650e-02 2.400e-02 6.900e-02 -1.400 1.200e-02 1.100e-02 1.600e-02 -1.300 6.300e-03 6.650e-03 6.100e-03 -1.200 4.200e-03 4.750e-03 3.650e-03 -1.100 2.900e-03 3.500e-03 2.350e-03 -1.000 1.900e-03 2.450e-03 1.400e-03 -0.900 1.150e-03 1.600e-03 7.100e-04 -0.800 5.500e-04 9.150e-04 2.600e-04 -0.700 1.200e-04 4.400e-04 5.600e-05 -0.600 5.400e-05 1.550e-04 1.200e-05 -0.500 1.350e-05 5.400e-05 1.300e-06 -0.400 8.650e-07 7.450e-06 4.950e-08 -0.300 6.250e-08 7.550e-07 0.000e+00 -0.200 0.000e+00 8.400e-08 0.000e+00 -0.100 0.000e+00 0.000e-08 0.000e+00 0.000 0.000e+00 0.000e+00 0.000e+00 | |============================================================================== ****************************************************************************** ANALYSIS PATH/DATA THAT LED TO SPECIFICATION: *** Comments Below are in terms of terminology that has been changing **** The proposal is designed to retain as much of the existing IBIS clamp syntax as possible. The dynamic clamp V-I curve tables follow all of the conventions of the existing V-I tables. The overall modeling approach is to decompose the dynamic clamp into its static and dynamic portions. The static part can be modeled by a regular clamp. The dynamic part is connected to the same rail voltage as its static part and modeled by a V-I curve that is shifted along the voltage axis by the offset voltage pulse. BIRD49 replaces the BIRD45.1 proposal of some new keywords shown below, but preserves the intended functionality. It also reponses to the comment that some of the V_trigger subparameters should be expressed in a typ-min-max format. The [Model Spec] keyword structure is proposed to do this. The replaced structure is below. *** Note Refer to Rejected BIRD45.1 for some Original Discussion on the Dynamic Clamp Functionality. The Discussion here is deleted since the older terminology and details introduced confusion *** BIRD49.1 adds the rules for when the time is negative and when the V_trigger_l and V_trigger_h thresholds are not used and can be omitted. The intent is to support having the dynamic clamps controlled by an external control so that they can be preset before the signal arrives at the device. A method was chosen that is based on the activation pulse that the simulator uses to initiate the driver transition. Most simulators do not have an independent pulse control to preset some other parameter. This method can be user configurable to deal with simulator differences in time relationships for driver activation on the net and possible phase differences of this component on a net. The time values may have to be readjusted for a particular part. However, the approach taken here should work for most practical cases. BIRD49.2 simplifies extends and simplifies the rules. Several modes of operation are defined based on the existance of non-existency of the [Add Model Spec] trigger subparameters (or keyword itself) and also for when the pulse table itself is missing. The dependency on an artificial negative time for one of the modes of operation in BIRD49.1 was not appealing. *** BIRD49.3 discussion with the revised Submodel terminology of BIRD48.4 **** BIRD49.3 is modified to use the submodel terminology and keywords of BIRD48.4. Also, the clocked mode is deleted because its operation interacted to much with timing simulator operation - outside the realm of IBIS. It was not clear that we could do describe the intended effects correctly (or even by approximation) independently. This could be a candidate for further research. We could adapt the triggered mode, even on a component-by- component basis to approximate the effect, as a work around. BIRD48.4 contains some corrections to editorial mistakes (data in pulse tables were incorrectly commented out and there were still references to the deleted clocked mode in the STATEMENT OF THE ISSUE section). ****************************************************************************** ANY OTHER BACKGROUND INFORMATION: Based on a conversation with Arpad Muranyi on 11/14/97. Modified per a discussion with Bob Ross, Chris Reid and Arpad Muranyi on March 11, 1998. ****************************************************************************** From owner-ibis Tue Jul 21 09:20:45 1998 Received: from hebe.or.intel.com (hebe.or.intel.com [134.134.248.4]) by server.eda.org (8.8.5/8.8.3) with ESMTP id JAA08572 for ; Tue, 21 Jul 1998 09:20:44 -0700 (PDT) Received: from ichips-jf.jf.intel.com (ichips-jf.jf.intel.com [134.134.50.200]) by hebe.or.intel.com (8.8.6/8.8.5) with ESMTP id JAA15304 for ; Tue, 21 Jul 1998 09:23:18 -0700 (PDT) Received: from xtg801.pdx.intel.com (xtg801.pdx.intel.com [134.134.120.169]) by ichips-jf.jf.intel.com (8.8.8/8.8.7) with ESMTP id JAA09861 for ; Tue, 21 Jul 1998 09:17:02 -0700 (PDT) Received: from ichips.intel.com by xtg801.pdx.intel.com (8.8.8/WW2.2 (Jones Farm)) id JAA10757; Tue, 21 Jul 1998 09:17:01 -0700 (PDT) Message-Id: <199807211617.JAA10757@xtg801.pdx.intel.com> X-Mailer: exmh version 2.0delta 6/3/97 To: ibis@eda.org Subject: IBIS Open Forum Minutes 7/17 Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Date: Tue, 21 Jul 1998 09:17:00 -0700 From: Stephen Peters DATE: 7/21/98 SUBJECT: 7/17/98 EIA IBIS Open Forum Minutes VOTING MEMBERS AND 1998 PARTICIPANTS LIST: AMP (Martin Freedman) Applied Simulation Technology Norio Matsui, Raj Raghuram Cadence Design (& UniCAD) C. Kumar, Don Telian, Patrick Riffault, Craig Lewis, Greg Fitzgerald, Paul Galloway, Patrick Dos Santos, Catherine Weiss, Alain Tribaudot, Geoffrey Ellis* Cypress Bruce Wenniger Digital Equipment Corp. Jeff Chu, Greg Edlund, Bob Haller Hewlett Packard (EEsof, etc.) Karl Kachigan, Henry Wu, Paul Gregory High Design Technology Razvan Ene HyperLynx Kellee Crisafulli*, Matthew Flora* Incases Olaf Rethmeier, Scott Jacobson, Werner Rissiek Intel Corporation Stephen Peters*, Arpad Muranyi*, Frank Kern, Will Hobbs, Prakash Radhakrishnan, Mohammed Hawana, Martin Chang Columbia, SC (formerly NCR) Dave Moxley* Mentor Graphics (Zeelan, Bob Ross*, George Opsahl, Mark Noneman, Interconnectix, etc.) Tom Dagostino, Karine Loudet, Jean Oudinot, Manuel De Almeida, Stephane Rousseau, Neven Orhanovic, Mohamed Mahmoud Mitsubishi Hoang Nguyen, Tam Cao Motorola (Ron Werner) National Semiconductor Syed Huq*, Cheng-Yang Kao, John Goldie, Ikchang Song North East Systems Associates Edward Sayre, Kathy Breda (NESA) NEC (Hiroshi Matsumoto) Quantic EMC (Mike Ventham) Symbios Logic Larry Barnes Texas Instruments Thomas Fisher, Harvey Stiegler, Vincent Chang, Jean-Claude Perrin*, Peter Forstner Thomson-CSF Jean-Marc Claveau, Laurent Duzaic, Saverio Lerose, Benoit Meyniel, Jean Lefebvre Viewlogic Jon Powell, Chris Rokusek*, Guy de Burgh, Gary Mandel VeriBest Ian Dodd, David Weins, Ian Gabbitas VLSI Technology D.C. Sessions* Zuken-Redac (John Berrie) OTHER PARTICIPANTS IN 1998: Actel Eric Tardif, Emmonvelle Gaudin Aerospatiale Lionel Dreux, Claude Huet Alcatel (Bell, Espace, etc.) John Fitzpatrick, W. Temmerman, Laure Bessettes, Jean-Claude Pourtau, Daniel Peron ALS Design Yves Mouquet Ansoft Eric Bogatin Apple Fred Floresca, Danny Itani Apteq Design Systems Dan FitzPatrick Atmel Ali Baktashian Avanti Nik Bannov CERN Olivier Clere, Jean-Michel Sainson, Rudi Zurbroken Compaq Shariq Rahma Crucial Technology Rathna Reddy* EIA Patti Rusher EMC Fawn Engelmann, Fabrizio Zanella ENST, Paris Jean-Jacques Charlot European CAD Standardization Adam Morawiec Intitiative (ECSI) Fairchild Semiconductor Peter LaFlamme H.A.S Electronics Haruny Said IBM Richard Steinle, Kevin Jackson Intracon Design Ltd. Derek Laidlaw Philips Semiconductor Todd Andersen Scottish Electronics Robert Easson Manufacturing Center (SEMC) Seagate Vanessa Howard SGS-Thomson Philippe Lefevre Siemens Gerald Bannert, Bernhard Unger, Christian Marot, Miguel Hernandez, Gil Russell Sun Microsystems Lam Dong, Kevin Ko Symmetry Andy Hughes Tektronix Nassrin Ghahyasi Ultratest International Chris O'Connor Xilinx Susan Wu In the list above, attendees at the meeting are indicated by *. Principal members or other active members who have not attended are in parentheses. Participants who no longer are in the organization are in square brackets. Upcoming Meetings: The bridge numbers for future IBIS teleconferences are as follows: Date Bridge Number Reservation # Passcode August 7, 1998 (916) 356-9200 6-62590 5632718 All meetings are 8:00 AM to 9:55 AM Pacific Time. We try to have agendas out 7 days before each Open Forum and meeting minutes out within 7 days after. When you call into the meeting, ask for the IBIS Open Forum hosted by Will Hobbs and give the reservation number and passcode. NOTE: "AR" = Action Required. -------------------------------- MINUTES ------------------------------------- INTRODUCTIONS AND MEETING QUORUM Although Bob Ross returned early from a vacation, Stephen Peters conducted the meeting as originally planned, and Bob took notes. Rathna Reedy from Crucial Technology who had called in before had some IBIS issues that needed to be dealt with off line by Stephen Peters. MEMBERSHIP UPDATE AND TREASURER'S REPORT Bob Ross reported that all of the EIA IBIS Open Forum membership payments have been received. The Forum consists of 24 official company members. REVIEW OF MINUTES AND AR'S No corrections were noted. The ARs will be discussed during the meeting. MISCELLANY/ANNOUNCEMENTS None. PRESS AND WEB PAGE UPDATES None. NEW MODELS AVAILABLE, LIBRARY UPDATE Stephen Peters reported that Bob Ross supplied these IBIS model URL additions and changes to be documented in the Minutes: Intel Pentium II models are located at: http://developer.intel.com/design/pro/devtools A revised Fairchild Semiconductor URL now references many IBIS models: http://www.fairchildsemi.com/models/ibis The National Semiconductor and Siemens URLs are now all lower case: http://www.national.com/models/ibis/0,1030,0,00.html http://www.siemens.de/semiconductor/products/ics/31/3177.htm There are now some Motorola ECL IBIS buffers for the URL: http://www.mot2.indirect.com/models/bin/logic_ic.html PMC-Sierra has IBIS Models (registration is required): http://www.pmc-sierra.com/Ibismodels/default.cfm Texas Instruments has added some more IBIS models for the Data Transmission Products. http://www.ti.com/sc/docs/msp/datatran/app_supp.htm Atmel library is deleted. The Samsung library locations are no longer known. OPENS FOR NEW ISSUES None. INTERNATIONAL/EXTERNAL PROGRESS - IEC 62014-1 (IBIS Version 2.1) - Bob Ross indicated no further report. He still expects formal ratification at the IEC meeting in September, 1998. - pr EIAJ ED-5302 Standard for I/O Interface Model for Integrated Circuit (IMIC) - Bob Ross stated that a presentation on this activity was given at the June 18, 1998 IBIS Summit meeting. - IEC 93/67/NP IBIS and EMC Simulation - Bob Ross and Jean Claude Perrin did not have any further progress to report. A goal is still to produce a document for the September 1998 IEC meeting. - JC-16.2 Subcommittee: Modeling and Test - D.C. Sessions had no further report. IBIS (EAST) USERS GROUP MEETINGS Bob Ross noted that minutes have been sent out on a meeting held on June 25, 1998. Activities are continuing regarding drafting an accuracy specification, proposing a connector model syntax, and developing an IBIS tutorial. The next meeting is scheduled for August 20, 1998 at Stratus Computer. DESIGN AUTOMATION CONFERENCE (DAC) IBIS SUMMIT MEETING REVIEW Bob Ross felt that the IBIS Summit meeting was very productive. A number of technical issues were resolved on site, and the general plan was developed for releasing Version 3.1 of IBIS shortly and Version 3.2 later (with some approved extensions). Four of the presentations along with the minutes of the meeting have been uploaded on eda.org under /pub/ibis/summits/dac98. We had a good discussion on future needs for IBIS. EDITING COMMITTEE Bob Ross uploaded a work in progress document ver3_1e.ibs on eda.org under /pub/ibis/wip. Stephen Peters uploaded an unofficial copy of ver3_1.ibs for review and voting. The BNF AR remains. AR - Bob Ross generate and post a BNF for IBIS Version 3.0 (an IBIS Version 3.0 ratification AR). IBISCHK2+ (VER 2.1.16) PROGRESS Bug fixes have been included in ibischk3 and in the ibischk2+ code within ibischk3. The plan is to do a final ibischk2+ Version 2.1.16 release with the same bug fixes. Chris Rokusek indicated that he has time to work on this in the next several weeks. AR - Matthew Flora, Chris Rokusek, and Bob Ross work together to (1) add all of the changes done in the ibischk3 code relative to bug fixes to the ibischk2+ source code, (2) Chris Rokusek generate executables, (3) and Bob Ross upload the executables on eda.org. Also, Syed Huq will generate a Linux executable. VERSION 3.1 PARSER DEVELOPMENT Bob Ross reported that all of the parser payments have been received (or in the case of one company, is being processed). Bob reported on checking of the Version 3.0.2 (vs. Version 3.0.1) parser on the provided test cases. He has found no problems so far and considers the ibischk3 portion to be in very good shape. Test cases for the latest bug fixes have been included and reviewed. The ebd testing also looks good, but real examples are needed for more comprehensive testing. Bob anticipates that we will find problems, but he does not want to hold up releasing the parser. Bob deferred a vote on releasing the parser and on payment of the contractor until later in the agenda. COOKBOOK No report. IBIS MODEL REVIEW COMMITTEE DISCUSSION Matthew Flora indicated no activity since last meeting. However, he still plans to send out a note to the reflector. His main concern is that only a few representative models be provided along with data sheets for a complete checkout. He will also check with other model review committee members. The contact address is: Matthew Flora, HyperLynx mbflora@hyperlynx.com AR - Matthew Flora issue to the IBIS reflector a short writeup on the IBIS IBIS Model Review committee. IEEE STANDARD COMPONENT DATA SHEET Stephen Peters discussed a new IEEE data sheet standardization activity. Bob Davis of Summit Computer Systems sent out information on this activity to the signal integrity reflector. Stephen forwarded the information to the IBIS reflector and talked with Bob. Stephen reported that the scope is to provide a human readable and machine parsable format for electrical and mechanical data sheet information. IBIS was referenced as one related data base. Stephen expects Bob Davis to participate in the IBIS discussions in the future. Stephen volunteered to serve as the IBIS representative to this committee (others are also welcome to join.) VOTES ON VERSION 3.1: EDITING COMMITTEE REVIEW LIST OF CHANGES Stephen Peters discussed the development of ver3_1.ibs. This was developed from ver3_1e.ibs, with the commented changes implemented. Stephen noted that ver3_1.ibs contains the approved BIRD47 for Electrical Board Description syntax, and pending BIRD52 for [Driver Schedule] editorial changes. Stephen also changed the order of the [Series Switch Groups] and [Series Pin Mapping] keywords since the description of [Series Switch Groups] follows more naturally the [Series Pin Mapping] keyword. BIRD44 - INTERPRETATION OF MIN/MAX/WEAK/STRONG DATA Stephen Peters suggested that because of other changes in the IBIS document, BIRD44 may need to be rewritten. He suggested putting BIRD44 to a vote to close it out. BIRD44 was rejected with one vote in favor. BIRD52 - [Driver Schedule] CLARIFICATIONS Stephen Peters introduced BIRD52 as an editorial change that has been included in the pending Version 3.1. Kellee Crisafulli raised the issue that if we were to revisit the [Driver Schedule] function, we would probably redo it in terms of the [Add Submodel] keyword pending for Version 3.2. Currently there exists a number of ignored elements which were retained so that changes to the ibischk2 parser would be minimized. Bob Ross stated that this was known when the [Driver Schedule] functionality was approved. At the June 18, 1998 IBIS Summit meeting we made some architectural decisions regarding [Add Submodel] concerning inheritance of voltages and not requiring or supporting unnecessary data. Bob indicated that our choices are to accept the [Driver Schedule] as is (and as approved in June, 1997) or redo it in terms of an [Add Submodel] construct. This would delay implementation of IBIS Version 3.1. To resolve this, Kellee proposed adding an editorial note to the Version 3.1 [Driver Schedule] keyword stating that this functionality is intended to be replaced by an [Add Submodel] construction in a future release. Chris Rokusek asked if [Driver Schedule] would still be supported. Bob and others indicated that it would continue to be supported. Kellee made the motion to add a statement to the IBIS Version 3.1 document under the [Driver Schedule] keyword regarding the intent that an [Add Submodel] implementation of this functionality is planned in a future release as the preferred implementation of this functionality. This motion was supported by D.C. Sessions as an amendment to the Version 3.1 document to be voted on. The motion was approved by vote. Stephen called for a vote on BIRD52. BIRD52 was approved unanimously. IBIS VERSION 3.1 Stephen called for a vote on IBIS Version 3.1 document, but as amended by the editorial addition to the [Driver Schedule] keyword. IBIS Version 3.1 was ratified (with the amendment) by unanimous vote. As a result of this approval an number of actions need to occur. AR - Bob Ross document the approved and rejected BIRDs. Bob (working with Stephen Peters) revise and upload the official copy of IBIS Version 3.1 on eda.org under /pub/ibis/ver3.1 with the approved editorial addition to the [Driver Schedule] keyword. While Bob did did not commit to developing an alternative [Add Submodel] syntax for [Driver Schedule] he will probably work on this and consult Kellee Crisafulli and others. IBISCHK3 RELEASE Bob Ross already had reviewed his testing of the ibischk3 Version 3.0.2. Bob proposed that we vote on the release of IBISCHK3 Version 3.0.2 parser and designate it as Version 3.1.0. Geoffrey Ellis asked if executables for other operating systems would be released, and Bob stated that we will produce the usual set of executables for other operating systems, as we always have done. IBISCHK3 was ratified as the official Version 3.1 parser by unanimous vote. IBISCHK3 PARSER CONTRACT PAYMENT. Bob Ross considered the ibischk3 parser development project completed and called for a vote to authorize full payment for the ibischk3 Version 3.0.1 parser. The committee discussed and recognized the fine, professional work done by the developer, Atul Agarwal. Release of the full payment was unanimously approved by vote. AR - Bob Ross handle the parser development project payment details through EIA. AR - Bob Ross work with Matthew Flora, Chris Rokusek, and Syed Huq to develop the official Version 3.1.0 source code distribution package and also to upload the executables for a variety of operating systems including DOS, Unix flavors, and Linux. VOTES ON INITIATING IBIS VERSION 3.2 AND IBISCHK Version 3.2.0: BIRD42.3 - MODELING CURRENT WAVEFORMS Stephen Peters called for a vote on BIRD42.3. Stephen stated that BIRD42.3 had been around for a while, but with minimal action. Bob Ross indicated that while there were some good ideas in BIRD42.3 regarding documenting the crowbar current, BIRD42.3 does have its controversial aspects. Current table extraction is not easily done by measurement. Simulator companies already successfully use voltage table based methods. A different method may be needed to deal with some more dominate noise effects due to internal clocks inside larger processors. So the additional complication of BIRD42.3 may not yield the expected accuracy improvements. BIRD42.3 was rejected with one vote in favor. BIRD48.4 - ADD MODEL Stephen Peters called for a vote on BIRD48.4. He indicated that there was a dependency that BIRD48.4 was needed for BIRD49.3 and BIRD50.3. Bob Ross briefly gave an overview of the changes. He stated that the changes agreed at the June 18, 1998 IBIS Summit meeting were included. The allowed submodel keywords were given in the text. Bob also noted that he uploaded some sample implementations associated with the [Add Submodel] functions. BIRD48.4 was unanimously approved by vote. BIRD49.3 - ADD MODEL DYNAMIC CLAMPS Stephen Peters called for a vote on BIRD49.3. Kellee Crisafulli pointed out some editorial mistakes in BIRD49.3 where the clocked mode was still mentioned in the STATEMENT OF THE ISSUE: section. Also Kellee noted that the [GND Pulse Table] and [POWER Pulse Table] examples had the data commented out by mistake. Bob Ross agreed that these were mistakes and proposed voting on BIRD49.3 with the corrections, as noted. This would be issued as BIRD49.4. BIRD49.4 (BIRD49.3 with the above changes) was approved by unanimous vote. AR - Bob Ross create the approved BIRD49.4 [Done] BIRD50.3 - ADD MODEL BUS HOLD Stephen Peters called for a vote on BIRD50.3. Kellee Crisafulli noted a spelling error in the ANALYSIS PATH/DATA THAT LED TO SPECIFICATION: section. Bob Ross felt that because the ANALYSIS PATH section of the bird is not part of the Version 3.2 specification proper it did not need to be changed. BIRD50.3 was approved by unanimous vote. VERSION 3.2 PARSER DEVELOPMENT PROJECT Bob Ross noted that we have now defined the additions to ibischk3 to support IBIS Version 3.2. Along with BIRD48.4, BIRD49.4 and BIRD50.3, the project will also include BIRD46.1 (for changing the file name length restriction from 8 to 20 characters) and BIRD51 (Adding 3-state_ECL Model_type). Stephen Peters asked if we now needed to arrange for new payment to Atul for the 3.2 parser. Bob said the arrangement would be to route some of the money from new source code purchases to Atul. AR - Bob Ross work with Atul Agarwal to start the ibischk3 development for IBIS Version 3.2. INPUT ENHANCEMENTS In the time remaining, D.C. Sessions introduced the topic of needed input enhancements to IBIS. This was based on some ASICs that he is working on. The main limitation is that the thresholds may need to be referenced to some new reference voltages. The fact that CMOS input thresholds are designed as a percentage of Vcc already poses a problem when the Vcc voltage of the devices is varied over its operating range. D.C. indicated that he is encountering this limitation in a number of JEDEC technologies. He mentioned the need for an AC offset voltage reference and a DC offset voltage reference. Bob Ross noted that the [Model Spec] method of handing is by voltage directly. This works if the thresholds are fixed, are a percentage of a supply or are offset from a supply. However, fixed values for supplies are assumed. D.C. proposed that the threshold reference voltages could be added to the [Pin Mapping] keyword. In practice, he actually stated a number of other reference voltages (such as core logic voltage) that are separated by design. However, he is just proposing one extension. This was discussed extensively. Upon suggestions, D.C. plans to start the discussion on the IBIS reflector. Bob noted that this will eventually have to evolve into a BIRD to be considered seriously by the Committee. OTHER NEW DIRECTIONS Arpad Muranyi also speculated on how long IBIS will be relevant. He saw additional complexity. D.C. Sessions noted that devices are really becoming more complicated, and IBIS is just documenting such enhancements. D.C. also noted that there may be a time when IBIS becomes obsolete and is replaced by some other format. One of Arpad's issues was that equation based specification can be more flexible since features could be added without keyword extensions. He and others still support the behavioral methodology because this approach keeps confidential the internal intellectual property. The equation approach allows including both the data and algorithms to process the data. Such an approach would allow extensions without requiring more keywords. This should be discussed on the IBIS reflector. Implementation suggestions would need to be evolved into an EGG or BIRD for serious consideration. Bob Ross noted that the EIA IBIS Open Forum continues to meet regularly and remain active (as opposed to disbanding upon approval of a version). This reflects on the changing technology and on the fact that IBIS continues to be relevant. People continue to be interested in using the IBIS format as the platform for technology changes and needs. NEXT MEETING: The next meeting will be on Friday, August 7, 1998 from 8:00 AM to 10:00 AM. ============================================================================== NOTES IBIS CHAIR: Bob Ross (503) 685-0732, Fax (503) 685-4897 bob_ross@mentorg.com Modeling Engineer, Interconnectix BU of Mentor Graphics 8005 S.W. Boeckman Road, Wilsonville, OR 97070 VICE CHAIR: Stephen Peters (503) 264-4108, Fax: (503) 264-4515 sjpeters@ichips.intel.com Senior Hardware Engineer, Intel Corporation M/S JF1-56 2111 NE 25th Ave. Hillsboro, Oregon 97124-5961 SECRETARY: Matthew Flora (425) 869-2320, Fax: (425) 881-1008 mbflora@hyperlynx.com Senior Engineer, HyperLynx, Inc. 17641 NE 67th Court Redmond, WA 98052 LIBRARIAN: Jon Powell (805) 988-8250, Fax: (805) 988-8259 jonp@qdt.com Senior Scientist, Viewlogic (formerly Quad Design) 1385 Del Norte Rd., Camarillo, CA 93010 This meeting was conducted in accordance with the EIA Legal Guides and EIA Manual of Organization and Procedure. The following e-mail addresses are used: ibis-request@eda.org To join, change, or drop from either the IBIS Open Forum Reflector (ibis@eda.org), the IBIS Users' Group Reflector (ibis-users@eda.org) or both. State your request. ibis-info@eda.org To obtain general information about IBIS, to ask specific questions for individual response, and to inquire about joining the EIA-IBIS Open Forum as a full Member. ibis@eda.org To send a message to the general IBIS Open Forum Reflector. This is used mostly for IBIS Standardization business and future IBIS technical enhancements. Job posting information is not permitted. ibis-users@eda.org To send a message to the IBIS Users' Group Reflector. This is used mostly for IBIS clarification, current modeling issues, and general user concerns. Job posting information is not permitted. ibischk-bug@eda.org To report ibischk2 parser bugs. The Bug Report Form Resides on eda.org in /pub/ibis/bugs/ibischk/bugform.txt along with reported bugs. To report s2ibis, s2ibis2 and s2iplt bugs, use the Bug Report Forms which reside under eda.org in /pub/ibis/bugs/s2ibis/bugs2i.txt, /pub/ibis/bugs/s2ibis2/bugs2i2.txt, & /pub/ibis/bugs/s2iplt/bugsplt.txt respectively. Information on IBIS technical contents, IBIS participants, and actual IBIS models are available on the IBIS Home page found by selecting the Electronic Information Group under: http://www.eia.org Check the pub/ibis directory on eda.org for more information on previous discussions and results. You can get on via FTP anonymous. ============================================================================== From owner-ibis Wed Jul 22 11:26:08 1998 Received: from newsgw.mentorg.com (newsgw.mentorg.com [192.94.38.66]) by server.eda.org (8.8.5/8.8.3) with ESMTP id LAA12224 for ; Wed, 22 Jul 1998 11:26:07 -0700 (PDT) Received: from emicx.wv.mentorg.com by newsgw.mentorg.com (8.8.8/CF5.40F) id LAA02379; Wed, 22 Jul 1998 11:21:55 -0700 (PDT) Received: from bob by emicx.wv.mentorg.com (8.7.5/CF5.38R) id LAA06502; Wed, 22 Jul 1998 11:21:53 -0700 (PDT) From: bobr@emicx.mentorg.com (Bob Ross) Received: by bob (4.1/CF5.23L) id AA11489; Wed, 22 Jul 98 11:21:52 PDT Date: Wed, 22 Jul 98 11:21:52 PDT Message-Id: <9807221821.AA11489@bob> To: ibis@eda.org Subject: IBIS VERSION 3.1, 3.2 To All: Per the voting of the July 17, 1998 IBIS meeting, IBIS Version 3.1 has been ratified. IBIS Version 3.1 is uploaded on eda.org under /pub/ibis/ver3.1 Also, per votes on BIRDs at the July 17, 1998, an UNOFFICIAL work in progress version of IBIS Version 3.2 is now on eda.org under /pub/ibis/wip/ver3_2a.ibs. It contains the BIRDs targetted for IBIS Version 3.2 plus some additional text relating to IBIS Version 3.2. The official ibischk3 parser executables will be uploaded within a few weeks after the executables are created. Bob Ross Interconnectix/Mentor Graphics From owner-ibis Wed Jul 22 11:50:06 1998 Received: from mailgate.cadence.com (mailgate.Cadence.COM [158.140.2.1]) by server.eda.org (8.8.5/8.8.3) with ESMTP id LAA12277 for ; Wed, 22 Jul 1998 11:50:05 -0700 (PDT) Received: (from smap@localhost) by mailgate.cadence.com (8.8.5/8.6.8) id LAA27778 for ; Wed, 22 Jul 1998 11:46:23 -0700 (PDT) Received: from milliways.cadence.com(158.140.142.7) by mailgate.cadence.com via smap (mjr-v1.2) id xma901133178.027771; Wed, 22 Jul 98 11:46:18 -0700 Received: (from geoff@localhost) by milliways.Cadence.COM (8.7.3/8.7.3) id LAA17380; Wed, 22 Jul 1998 11:45:26 -0700 (PDT) Date: Wed, 22 Jul 1998 11:45:26 -0700 (PDT) From: Geoffrey Ellis Message-Id: <199807221845.LAA17380@milliways.Cadence.COM> To: ibis@eda.org Subject: RE: IBIS VERSION 3.1, 3.2 The 3.1 Version is apparently NOT available through the Web site. I was able to upload it using anonymous ftp to vhdl.org, not eia.org. Geoffrey Ellis Cadence Design Systems From owner-ibis Fri Jul 31 13:47:56 1998 Received: from newsgw.mentorg.com (newsgw.mentorg.com [192.94.38.66]) by server.eda.org (8.8.5/8.8.3) with ESMTP id NAA06889 for ; Fri, 31 Jul 1998 13:47:56 -0700 (PDT) Received: from emicx.wv.mentorg.com by newsgw.mentorg.com (8.8.8/CF5.40F) id NAA22689; Fri, 31 Jul 1998 13:43:39 -0700 (PDT) Received: from bob by emicx.wv.mentorg.com (8.7.5/CF5.38R) id NAA15911; Fri, 31 Jul 1998 13:43:36 -0700 (PDT) From: bobr@emicx.mentorg.com (Bob Ross) Received: by bob (4.1/CF5.23L) id AA25504; Fri, 31 Jul 98 13:43:37 PDT Date: Fri, 31 Jul 98 13:43:37 PDT Message-Id: <9807312043.AA25504@bob> To: ibis@eda.org Subject: IBIS MEETING AGENDA 8/7/98 IBIS Open Forum Meeting Agenda for 8/7/98 Bridge Number Reservation # Passcode (916) 356-9200 6-62590 5632718 All meetings are 8:00 AM to 9:55 AM Pacific Time. When you call into the meeting, ask for the IBIS Open Forum hosted by Will Hobbs and give the Reservation Number and Passcode. Stephen Peters will conduct the meeting. 8:00 Check-In, Intros, Announcements Ross - Intros of New IBIS Participants, Meeting Quorum Ross - Membership Update and Treasurers Report Rusher - Review of Previous Meeting's Minutes (and ARs) Ross - Miscellany/Announcements All - Press & Web Page Updates Huq, All - New Models Available, Library Update Powell, All - Opens for New Issues All 8:25 Administrative and Project Discussions International/External Progress - IEC 62014-1 (IBIS Version 2.1) Rusher - pr EIAJ ED-5302 Standard for I/O Interface Model for Integrated Circuits (IMIC) Raghuram - 93/67/NP IBIS and EMC Simulation Perrin - JEDEC JC-16.2 Modeling and Testing Sessions - IEEE Standard Component Data Sheet Davis/Peters/Ross IBIS (East) Users Group Meetings Edlund Summit Meetings Ross IBISCHK2+ (Ver 2.116) PROGRESS Flora/Rokusek Version 3.1/3.2 Parser Development Ross - Billing & Payment - Executables Version 3.2 Document Ross Version 3.2 Parser Development Ross Cookbook Status Peters IBIS Model Review Committee Flora New Administrative Issues All 9:00 Technical Discussion BUG29 - n\, \r, \r\n Line Terminators Need to be Ellis Handled Input Issues Sessions New Technical Issues All 9:50 Wrap Up and Next Meetings Plans Peters 9:55 Sign Off