Minutes OO-VHDL Std. Group

12 Sept. 98, 9:00 am - 1:05 pm
EPFL, Lausanne, Switzerland

Minutes by: W. Nebel, Sept. 12th, 1998

attendees:

Peter Ashenden	PA	U. of Adelaide	petera@cs.adelaide.edu.au
Ken Bakalar	KB	Mentor Graphics	kenneth_bakalar@mentorg.com
Ernst Christen	EC	Analogy	christen@analogy.com
Bachir Djafri	BD	U. of Evry	djafri@lami.univ-evry.fr
Masamichi Kawarabayashi	MK	NEC	kaba@lsi.nec.co.jp
Wolfgang Nebel	WN	OFFIS	nebel@computer.org
Wolfram Putzke-Roeming	WP	OFFIS	putzke@offis.uni-oldenburg.de
Ron Waxman	RW	EDA Stds Consulting	r.waxman@computer.org
John Willis	JW	FTL Systems	jwillis@ftlsys.com

agenda:

Welcome	(AP/WN)
Minutes last meeting	(PA)
OO-Requirements Document
Objective VHDL LCS	(WP)
SUAVE presentation	(PA)
Relation to SID Study Group	(PA/WN)
Language design process trial use standard selection of evaluation candidates evaluation criteria evaluation procedure	(all)
Next Meeting(s)	(all)

Welcome

The meeting was chaired by PA.

Minutes last meeting

There were no comments on the minutes of the last meeting (June 19th, 1998). PA went through the action list of that meeting:

AP!	GP will activate the subcommittee, add John Willis to the group and present the results at the next meeting at FDL'98. JW reports that GP has produced a draft but could not transfer to the yet. > still open!
AP!	JM to post a more complete table of estimated mappings of Function Points to LOC. since JW was not present, this has not been discussed. > still open!
AP!	JM to report back to the group on his evaluation of the feasibility of using Function Point Analysis to estimate the effort in implementing compiler changes related to the difference between VHDL and any proposed OO extensions. JM has produced a document (available on the EDA.ORG server). Its FP analysis is based on the syntax graph. Its applicability needs further discussion in presence of JM. > discussion postponed!
AP!	OFFIS to present effort break down (analyzer/traslator) to implement Objective VHDL. WN reports: For Objective VHDL: syntacic analysis using generator: 1-2 person weeks semantic analysis: some person months translator prototype: 12 personmonths PA reports: For SUAVE: due to code generation implementation and genericity larger effort than Objective VHDL. > done
AP!	JW to contact IEEE for procedure to establish (two) trial-use-standard(s). WN reports that according to Victor Berman there is not principle obstacle against two trial use standards. > done
AP!	WN to post LCS on WWW > done
AP!	JW to send SV LCS to WN. > done
AP!	WN to consolidate Objective VHDL LCS respectively. no implications from SV seen, but additional user feed back considered in an update of the Objective VHDL LCS. > done
AP!	Peter Ashenden to consider SV LCS in the SUAVE LCS respectively. > done
AP!	WN to contact Jim Heaton and set up a partially joint meeting of both groups at FDL. see respective agenda item > done
AP!	JW to come up with a set of examples for time abstraction. > open
AP!	WN to contact VHDL.ORG webmaster. Webpage resurrected. > done
AP!	WN to post slides on WWW > obsolete

OO-Requirements Document

JW reports that after several attempts GP and himself did not succeed to transfer a draft document of 6 pages which GP has produced for further discussion. No other members of the subcommittee have been involved so far.
The action is still open.

Objective VHDL LCS

WP gave a quick walk through the Objective VHDL tutorial. An on-line version is available at:
http://eis.informatik.uni-oldenburg.de/research/request.html KB raised a question on the relation between Objective VHDL and the VHDL event driven simulation semantics. WN: the signal assignment and process activation mechanisms which are the essence of the event mechanism are preserved without modification.
A discussion arose on the invocation of methods in entity objects. WP: They can be made visible by means of the "for entity" construct.
KB asked about the visibility scopes of sequences of "for signal, varaibel" statements. WP: This is defined in Objective VHDL (partial hiding), but may need further documentation in the LCS document.
WP emphasized on the new formal generic clause for type classes which allows a parameterization on type objects.
Finally WP reported that the current implementation features an Objective VHDL analyzer and an Objective VHDL to VHDL translator based on the LEDA intermediate format which had been extended for Objective VHDL. The tools can be ordered from LEDA for evaluation (sales@leda.fr). OFFIS has first experience with the successfull synthesis of Objective VHDL models using the path:

Objective VHDL
      |
      V
  Translator
      |
      V
    VHDL
      |
      V
Design Compiler

SUAVE presentation

PA gave a brief presentation of the key OO features of SUAVE. He deliberately did not focus on the communication features (see next agenda item). PA stated that SUAVE is also based on the group's requirements document. The concepts he presented included:

ADTs in packages with some discussion on the visibility rules;
tagged records;
genericity in types which go bejond the Objective VHDL approach because the SUAVE concept allows types as parameters of type class declarations;
mixin inheritance

PA also refered the group to the SUAVE online tutorial:
http://www.cs.adelaide.edu.au/~petera/

PA stated that the current implementation supports a full syntax check and a partial static semantics check as well as the code generation for the Univ. of Cincinnati Simulator.

Relation to SID Study Group

PA and WN reported on the result of a meeting with representatives of the SID Study Group: present: Jim Heaton (SID), Kamal Hashmi (SID + OO), Peter Ashenden (SID + OO), Wolfram Putzke (SID + OO), Wolfgang Nebel (OO). At that meeting an agreement was found:
There are 2 study groups currently active in complementary domains:

System level interface design (SID) with scope: Interfaces and communication through/across interfaces.
Object oriented extensions to VHDL (OO VHDL) with scope: Language techniques for OO modelling.

There are 3 paths of development in work at this time:

VHDL+ in the SID Study Group
Objective VHDL in the OO Group
SUAVE in the OO Group.

The areas of coverage for the paths are:

It has been agreed that the SID&OO Groups will follow the paths as defined above. Development of SUAVE will be addressed to the SID/OO Group as appropriate.
There will be joint membership of both groups and complete transparency of working papers and proposals to ensure that overlap and conflict are eliminated.
SID and OO Groups intend to proceed independently in time to produce drafts for ballot.

Language design process

trial use standard

The essence of the discussion was whether to follow previous decisions of the group and to apply for more than one trial use standards or not. The group had consensus that the ultimate goal must be to have ONE final standard. Given the the current status of proposals the options are:

go for two trial use standards (Objective VHDL and SUAVE)

pro:	implementations are ready to be evaluated by industry, the IEEE stamp makes ensures that the proposals are public, controlled by a committee and stable during the evaluation. This could encourage evaluators.
con:	since there are two competing candidates, the final solution will be either one of them or non of them, hence there is a severe risk for modeling and implementation investments in either proposal. This could discourage evaluators. Applying for the trial use standard is a significant effort which binds resources and delays the process.

do the evaluation of both proposals independently and without a formal stamp of the IEEE as fast as possible, collect feed back and start a consolidation based on that with the objective of a consolidated final standard.

pro:	user experience feedback before any further technical decisions.
con:	further investments in tools and models will make later changes in both proposals more expensive and hence hinder for consolidation.

consolidate both proposals now into a unified propsal which can be proposed as final standard.

pro:	better chances for consensus decision in the group
con:	current investments in tools and models are not well exploited, significant delay of work, decisions on language features are made without user experience feed back

WN proposed: All optins have considerable drawbacks. In view of some similarity in some of the features of Objective VHDL and SUAVE as well as some complementarity in other domains, it might be worth to investigate whether a consolidation of the common features is feasible w.r.t. to consistency with the other features of the proposals. At the time the complementary facets could be kept different until user experience proves or falsifies their effectiveness.

The features were classified:

facet	Objective VHDL	SUAVE
abstract communication	-	+
entity objects	+	-
type genericity	(-)	+
type classes	+	+

This means that the type classes (and possibly the type genericity) as largest common denominator should be subject of an action on a subcommittee to investigate consolidation possibilities. The group formed a subcommittee consisting of: PA, WN (or OFFIS representative) and JW.

AP! PA,WN,JW to report on type class consolidation feasibility by Dec. 31st., 98.

selection of evaluation candidates
> postponed
evaluation criteria
> postponed
evaluation procedure
> postponed

Next Meetings

DATE'99, Munich, Germany, March 10-12, 1999
HDL-CON (IVC/VIUF)'99, Santa Clara, US, April 6-9, 1999

Summary of actions:

AP! GP will activate the subcommittee, add John Willis to the group and present the results at the next meeting at FDL'98.
AP! JM to post a more complete table of estimated mappings
AP! JW to come up with a set of examples for time abstraction.
AP! PA,WN,JW to report on type class consolidation feasibility by Dec. 31st., 98.

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