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Minutes OO-VHDL Std. Group 19 June 98, Mentor Graphics, Santa Clara

Minutes by: W. Nebel, June 19th, 1998 with corrections by John Michael Williams.

attendees:

Giovanni Bezzi GB Italtel giovanni.bezzi@italtel.it
Dale Martin DM Clifton Labs dmartin@clifton-labs.com
Wolfgang Nebel WN OFFIS nebel@compuer.org
Greg Peterson (part time) GP AFRL gdp@vhdl.org
John Michael Williams JM Markanix Co. jwill@pacbell.net
John Willis JW FTL Systems jwillis@ftlsys.com

agenda:

Welcome   (WN)
Open Actions   (subcommittee chairs)
  Requirements Review (GP)
  LCS Documents (WN)
  Function Point Analysis(JM)
Workplan   (all)
  Schedule  
  Refinement Procedure of LCS Documents 
  Vote on Trial Use Standard(s) 
Next Meeting(s)   (all)

Welcome

The meeting was chaired by WN. He apologizes Peter Ashenden, the co-chair of the group, who could not make it this time. WN distributed two documents:
  1. Objective VHDL - Requirements Collection and Design Objective for object oriented extensions to VHDL - by Wolfram Putzke-Röming, Martin Radetzki, Wolfgang Nebel.
  2. Objective VHDL Language Change Specification by Serge Maginot, Wolfgang Nebel, Wolfram Putzke-Röming, Martin Radetzki, Version 1.1

The group approved the proposed agenda and the minutes of the last meting (March 19th, 1998).

WN thanked the group for the confidence expressed by the election result and all members for their interest. He also interpreted the election result as a principle agreement on his position statement. He briefly went through the position statement and summarized the past principle decisions:

  • agreement on requirements document presented June, 1996, as baseline of a requirements document of the group;
  • unanimous vote on going for trial use standards June, 1997

Open Actions

Requirements review: GP as chair of the subcommittee reports, that due to a misinterpretation the review has not yet started. It was clearified, that the review should be based on the Objective VHDL Requirements document (1.) which is identical to the agreement of the group as of June 96. AP! GP will activate the subcommittee, add John Willis to the group and present the results at the next meeting at FDL'98.

Language Change Specifications: WN reports that the LCS document for Objective VHDL is ready (2.).

Function Point Analysis (FPA): JM presents the idea behind FPA, which originated from Albrecht (IBM) and can be read in a book by Dreger (Boeing). The idea is to estimate the number of function points of a system from the requirement document. A function point is equivalent to e.g.:

  • 125 lines of C
  • 50 lines of ADA (figure just for illustration)
  • 10 lines of Excel (figure just for illustration)
JW propsed that the scope of the change proposed should not be limited by the tool implementation effort, but be judged according to the efficiency increase of the designer. WN added that we should target at a good cost/benefit ration which opens the market. This was agreed by the group. JW made the proposal that function points could be a possible meassure of the efficiency increase if it is possible to relate function points between VHDL and OO-VHDL (generic term used for any object oriented extension of VHDL). If the line count to weighted with the effort to write a line of source code in a particular language it would give an effective measure of efficiency in/decrease.
AP! JM to post a more complete table of estimated mappings of Function Points to LOC.
AP! JM to report back to the group on his evaluation of the feasibility of using Function Point Analysis to estimate the effort in implementing compiler changes related to the difference between VHDL and any proposed OO extensions.
AP! OFFIS to present effort break down (analyzer/traslator) to implement Objective VHDL.

Workplan

WN presented a proposal for a workplan:
  • review and comment (e-mail) LCS(s) until Aug. 1st, 1998 (all)
  • incorporate comments (proposers)
  • distribute enhanced LCS(s) 1 week before FDL'98
  • strawman vote on LCS(s) for trial use standard at FDL'98
  • industrial evaluation (2 years)

The group discussed on whether to go for one or two trial-use-standards. JW reminded of the VHDL-AMS experience, where significant investments had been made by two parties in different proposals, which resulted in little flexibility in defining the final standard. It thus must be clear that the status of a trial-use-standard needs to be made very clear in order to set the level of expectations correctly. In the actual case the two proposals are orthogonal w.r.t. to some features, e.g. structural domain (Objective VHDL only), explicit direct communication (SUAVE only), while there is some overlap in other domains (type classes). Hence the group agrees that real experience should be gained with the different sets of features, but the ultimate objective should be a single language.

JW brought up the VHDL+ initiative, which is gong for a PAR and claims to also cover OO, however, not yet with the current implementation. GP pointed out that VHDL+ has currently a lack in OO and might well take up proposals from the OO-group. Some interaction between both groups is needed. The group briefly discussed the issue of parts of a standard being protected by patents.

AP! WN to contact Jim Heaton and set up a partially joint meeting of both groups at FDL.
AP! JW to contact IEEE for procedure to establish (two) trial-use-standard(s).
AP! WN to post LCS on WWW

JW pointed the group to the shared variables (SV) ballot which is likely to be accepted. There are some changes in VHDL as a consequence of the SVs which should be considered and taken up in the OO-VHDL LCS(s) in order to avoid unnecessary iteration loops. This should be done before FDL.
AP! JW to send SV LCS to WN.
AP! WN to consolidate Objective VHDL LCS respectively.
AP! Peter Ashenden to consider SV LCS in the SUAVE LCS respectively.

JW proposed to consider an abstraction of the time domain into the scope of OO-VHDL. Examples could be ranges of time, relative time, etc. WN adds that this could be useful as input for constraint specification and scheduling.
AP! JW to come up with a set of examples for time abstraction.

The group agreed on the workplan and schedule.

Requirements for Trial-Use-Standards

WN presents a draft set of requirements for trial-use-standards, which were discussed and ammended by the group:
  • the language definitions must be publicly available and freely implementable,
  • be based on documented user requirements,
  • the extensions should be minimal but as far as assessible complete,
  • the concepts should be consistent with the basic VHDL philosophies and VHDL 1076 LRM,
  • an implementation must be available or become available by spring 99 VIUF (April 6-9, 1999) at least at such a level which allows an evaluation with real designs;
  • it should possibly be accessible free of charge or at cost of delivery for evaluation purposes;
  • there should be sufficient confidence that the proposals will be professionally evaluated during the life-time of the trial-use-standard.
The group agreed on this set of requirements.

WWW-Server

The group agreed to activate the server. Contacts through Paul Menchini, Randy Harr or directly (most efficient) VHDL.ORG webmaster. There should be mirrors of the IEEE OO-VHDL page in Europe (SIG-VHDL.ORG) and Australia (Peter Ashenden?). AP! WN to contact VHDL.ORG webmaster.
AP! WN to post slides on WWW.
AP! WN to set up mirror of the server in Europe.
AP! WN to ask VHDL.ORG to set a link to SIG-VHDL.ORG

Next Meeting

  • FDL'98, Laussanne, Switzerland, Sept. 7-12, 1998 http://c3iwww.epfl.ch/fdl98/ (DASC meetings Sept. 11 and 12)
  • DATE'99, Munich, Germany, March 10-12, 1999 (not yet decided)
  • spring VIUF'99, Santa Clara, US, April 6-9, 1999

Summary of Actions:

AP! GP will activate the subcommittee, add John Willis to the group and present the results at the next meeting at FDL'98.
AP! JM to post a more complete table of estimated mappings of Function Points to LOC.
AP! JM to report back to the group on his evaluation of the feasibility of using Function Point Analysis to estimate the effort in implementing compiler changes related to the difference between VHDL and any proposed OO extensions.
AP! OFFIS to present effort break down (analyzer/traslator) to implement Objective VHDL.
AP! JW to contact IEEE for procedure to establish (two) trial-use-standard(s).
AP! WN to post LCS on WWW
AP! JW to send SV LCS to WN.
AP! WN to consolidate Objective VHDL LCS respectively.
AP! Peter Ashenden to consider SV LCS in the SUAVE LCS respectively.
AP! WN to contact Jim Heaton and set up a partially joint meeting of both groups at FDL.
AP! JW to come up with a set of examples for time abstraction.
AP! WN to contact VHDL.ORG webmaster.
AP! WN to post slides on WWW
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