Sessions and papers

Presenter / moderator

Files

Keynote 1
Communications 101 for EDA

Steve Schultz (SI2)

Presentation

Impact of design-manufacturing interface (I)

Juan-Antonio Carballo (IBM)

The X Architecture: Roadmap for Design for Manufacturing Methodology

Ken Rygler (Rygler and Associates)

Presentation

Manufacturability Metrics and RET Tradeoffs for Physical Design and Layout

Luigi Capodieci (AMD)

Paper

Design Rules for Real Patterns

Alexander Starikov (Intel)

Paper

Impact of design-manufacturing interface (II)

Juan-Antonio Carballo (IBM)

Layout Methodology Impact of Resolution Enhancement Techniques

Lars Liebmann (IBM)

Paper

Designing-in test & repair IP for manufacturing yield

Yervant Zorian (Virage Logic)

Presentation

Impact of DFM and RET on Standard-Cell Design Methodology

Paul de Dood (Prolific)

Paper
Presentation

The importance of layout density control in semiconductor manufacturing

Vivek Singh (Intel)

Paper

Unified databases and data models

Gary Smith (Gartner)

Design Systems Evolution and the Need for a Standard Data Model

John Darringer (IBM)

Paper

Facilitating EDA Flow Interoperability with the OpenAccess Design Database

Mark Bales (Cadence)

Paper
Presentation

Introduction to Milkyway

Lawrence Brevard (Synopsys)

Presentation

Interoperability, Data Models, and Databases

Michael Riepe (Magma)

Presentation

New automated methodologies and flows (I)

Naresh Sehgal (Intel)

Hard IP Group Design

Howard Sachs (Telairity)

Paper
Presentation

The Arrow of Time: Following Timing Constraints in an RTL to GDSII Flow

Dwight Hill (Synopsys)

Paper
Presentation

eL-Architect: Using a Design Flow e-Learning tool in CAD/EDA and VLSI education

José A. Lima (Univ. of Minho)

Presentation

New automated methodologies and flows (II)

Takahide Inoue (STARC)

Software-Compiled System Design: A Methodology for Field-Programmable Design

Jeff Jussel (Celoxica)

Paper
Presentation

Improving SoC Design Flows with Robust and Precise Embedded Memory Models

Jay Abraham (Silicon Metrics)

Paper

Building Design Process in a Startup Company

David Gates (ATI)

Paper
Presentation

Keynote 2
Design Challenges & Solutions for 90nm/130nm Technology

David Lan (TSMC)

Methodologies of Industrial Usage of Formal Verification

Sandeep Shukla (Virginia Tech)

Property Specification: The key to an Assertion-Based Verification Platform

Harry Foster (Verplex Systems)

Paper
Presentation

A Verification Synergy: Constraint-Based Verification

Carl Pixley (Synopsys)

Paper
Presentation

Formal Interface Compliance Verification

C. Norris Ip (Tempus Fugit)

Paper
Presentation

Content in EDP package but not presented

PROGRESS: Combining Topdown and Bottom-up System Design Methodology

James Armstrong et al. (Virginia Tech.)

Paper

Total Hot Spot Management from Design Rule Definition to Silicon Fabrication

Soichi Inoue (Toshiba)

Paper

Code Generation from a Single Source Structural Specification

C. Schneider (Micronas)

Paper