SystemC AMS - Frequently Asked Questions
- What is the main reason for defining the SystemC AMS standard?
- What is the main difference between Verilog-AMS and the SystemC AMS extensions?
- How do the SystemC AMS extensions fit into the spectrum with existing hardware description languages?
- How can the user community interact with the SystemC AMS working group?
- Why doesn't the SystemC AMS standard contain any header files or other source files? Where can I get such files?
- Does Accellera Systems Initiative target the development of an open source proof-of-concept implementation?
- I found a simulator called "SystemC-AMS" on www.systemc-ams.org. Is this simulator compatible with the SystemC AMS standard?
- Which industries are using the SystemC AMS extensions?
- Is the SystemC AMS language supported by commercial EDA tools?
- My local EDA vendor is not supporting SystemC AMS. Is there another way to use SystemC AMS?
- I would like to learn more about the SystemC AMS extensions. Where can I find books, courses, or other training materials?
- What are the differences between SystemC AMS 1.0 and AMS 2.0?
- Is there already a simulator supporting the SystemC AMS standard?
- Is there an updated user's guide for the SystemC AMS standard?
- Is SystemC AMS an international standard?
The SystemC AMS standard fulfills the need of the electronics industry to have a standardized system-level modeling language for mixed-signal applications based on SystemC. The AMS standard defines the execution semantics and language constructs for system-level design and modeling of embedded analog/mixed-signal systems at higher levels of abstraction, focusing on modeling accuracy, fidelity and simulation speed.
For abstract mixed-signal modeling, SystemC AMS offers the efficient Timed Data Flow model of computation to describe continuous signals in a discrete-time manner. The use of data flow semantics make the simulation much faster than traditional real-number-modeling approaches (e.g. Verilog-AMS wreal), which use the inefficient discrete-event (digital) simulator. Timed Data Flow simulation in SystemC AMS applies smart temporal abstraction techniques which reduce the simulation overhead, resulting in a significant speed-up, which is essential for virtual prototyping. This technique is comparable with TLM, but is now introduced for AMS signals.
How do the SystemC AMS extensions fit into the spectrum with existing hardware description languages?
The SystemC AMS extensions focus on the system-level (ESL) and architecture modeling aspects for mixed-signal applications, such as communcation, RF, automotive and sensor applications. By having AMS extensions for SystemC, users can now create mixed-signal virtual prototypes to make an executable description of the entire system in a C++ based manner, enabling a seamless integration of HW/SW architectures in SystemC, TLM, software in C, and mixed-signal functions described using the SystemC AMS extensions.
The SystemC community members can interact with the AMS working group by joining the AMS discussion forum. The forum can be used to discuss or ask questions on how to use the new AMS language. In case your company is member of Accellera Systems Initiative, you can become member of the SystemC AMS working group.
Why doesn't the SystemC AMS standard contain any header files or other source files? Where can I get such files?
The SystemC AMS standard only consists of the language reference manual and does not include an implementation. Commercial and open-source implementations are currently appearing on the market.
Does Accellera Systems Initiative target the development of an open source proof-of-concept implementation?
A proof-of-concept implementation for SystemC AMS is not developed by Accellera itself, but is actively supported by one of its allied member organizations.
I found a simulator called "SystemC-AMS" on www.systemc-ams.org. Is this simulator compatible with the SystemC AMS standard?
The website www.systemc-ams.org is not owned or maintained by Accellera, but by the former study group who explored AMS capabilities in SystemC many years ago. The information available on this website is completely independent from any Accellera Systems Initiative publication or release. Instead, one of the Accellera Systems Inititative allied member, COSEDA Technologies, released a proof-of-concept implementation compliant with SystemC AMS standard. You can download this proof-of-concept implementation here.
At the SystemC AMS Day 2011, semiconductor, automotive and EDA industry presented the practical usage of the SystemC AMS standard in a wide variety of applications. This event clearly showed the industry adoption of SystemC AMS. As part of the SystemC AMS 2.0 release, a quote sheet has been made to underline the growing industry appreciation and support for this standard.
Please contact your local EDA vendor representative whether SystemC AMS is supported. As SystemC AMS is built on top of SystemC, most SystemC IEEE Std 1666-2011 compatible simulators can cope with the SystemC AMS capabilities.
The SystemC AMS open source proof-of-concept implementation is a class library in C++, and therefore can be compiled against a SystemC IEEE Std 1666-2011 compatible commercial simulator. In this way, your SystemC AMS models, as well as the SystemC AMS kernel resides in 'user space'. As commercial simulation environments often instrument the design with elements for tracing and simulation control, it is expected that some of these features are not supported for the AMS models.
I would like to learn more about the SystemC AMS extensions. Where can I find books, courses, or other training materials?
Recommended is to start reading the SystemC AMS user's guide, which is part of the bundle containing the SystemC AMS 2.0 language reference manual, which can be downloaded here. The user's guide explains all fundamentals of the AMS language and how to use the extensive set of features for AMS behavioral modeling at the system level. The most recent tutoral, including the presentations as webcast and training examples, was given at DVCon 2014 and can be found here.
The SystemC AMS 2.0 standard introduces new language constructs to support a more dynamic and reactive behaviour when using the Timed Data Flow (TDF) modeling style. When using the new member fuctions, the TDF timestep, rate and delays can be changed during simulation. Furthermore, the language has been made compatible with the latest SystemC standard, IEEE Std 1666-2011. More information on the differences between AMS 1.0 and AMS 2.0 can be found in the Annex of the SystemC AMS 2.0 LRM.
Please contact your local EDA vendor representative whether SystemC AMS is supported in their tooling. One of the Accellera Systems Initiative allied members, COSEDA Technologies, released an open source proof-of-concept implementation compliant with the SystemC AMS 2.0 standard.
The user's guide is part of the SystemC AMS 1.0 release and explains the basic concepts of SystemC AMS. The AMS working group members will continue to work on the user's guide to document all new capabilities of the SystemC AMS language, including examples and detailed explanations of the dynamic and reactive modeling features.
Yes. SystemC AMS 2.0 standard was transferred to IEEE, resulting in the release of IEEE Std 1666.1-2016. Thanks to Accellera, this IEEE standard is made available under the IEEE Get Program free of charge. You can download the IEEE Std 1666.1-2016 here.
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