Subject: Re: Verification Education Workshop at DAC
From: Adam Krolnik (krolnik@lsil.com)
Date: Thu May 09 2002 - 10:57:33 PDT
Hi Sean;
Reading this over, I stopped on the first paragraph and wanted
to encourage that the audience be expanded a little.
You wrote:
"With up to 70% of the design cycle spent in functional verification,
it is increasingly difficult to staff a team of talented verification
engineers. Today's verification engineer must be aware of all of the
available methodologies and have an understanding of the underlying
technology."
These courses need to be presented as foundational knowledge
for digital design. They should not portray this knowledge as
'for verification engineers only'. The best designers are the
ones who understand the challenge of verifying a design, be
it their own or a colleagues. Verification starts with good
design practices.
Before I would teach those topics listed, I would want to teach
new engineers the thought process of looking for potential errors
in a design. How many new engineers do you see that have the
idea, "what could be wrong?"
This is a good topic to teach - for everyone.
Adam Krolnik
Verification Mgr.
LSI Logic Corp.
Plano TX. 75074
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