Subject: Re: system task
From: Adam Krolnik (krolnik@lsil.com)
Date: Fri Mar 22 2002 - 13:33:13 PST
Hi Prakash;
You wrote:
:I totally agree with the utility of delay but I don't
:like the distance between the system function and the clock
:specification. I agree
:that we have to think through the specification and
:interpretation complexities of sequential functions.
While it, delay(), is written like a function, we should
think of it more like part of the actual assertion code
which uses the step statement when a sequential expression
is used.
So, you want to know which clock makes the function work.
What are your thoughts of this example (real life example)?
assert (~ (delay(tq_valid_buf & tq_replay,1)
&& `TQ_XDP.tq2s_real_acexc)) @@(posedge clk)
else $error("tq_replay and tq_acexc asserted at same time")
This code would be equivalent.
always @(posedge clk) begin
assert (~ (XXXX_delayed
&& `TQ_XDP.tq2s_real_acexc)) @@(posedge clk)
else $error("tq_replay and tq_acexc asserted at same time")
XXXX_delayed = tq_valid_buf & tq_replay;
end
Is the association of the step control to the delay() function
troublesome? The benefits of the function become clearer as the delay
cycles get larger and the amount of signals delayed become greater.
:> > isunknown() - signal has X's in it ::= ^sig ===1'bx
:>
:This is interesting from formal analysis perspective.
:That is because we use synthesis interpretation of RTL.
:Comparisions to X don't work there. This one will require some
:study.
This kind of assertion wouldn't have any formal basis for validation.
This is to prevent wasting debug time because some inputs have not
been driven (connected.) The function was created because it was
too difficult to correctly check that a signal was driven with
a valid value. E.g.
assert (^signal == 1'bx);
Did I get you? The above code has an intentional error to
show how easy it is to gloss over the fact that I should have
used === instead to compare with X.
:> If we do this, I would recommend sticking with a known comparison
:> mechanism/algorithm, such as casex. To use the '?' for don't care,
:>we could choose casez
:Again, we have to make sure that synthesis
:interpretation will be consistent
:with simulation. Hence, casex should be the way to
:go.
I don't understand your reasoning Prakash. Both casex and casez
are defined for synthesis. Your tools already support any definition
that we would choose. Do you see a potential problem that you could
share.
Thanks for taking the time to talk.
Adam Krolnik
Verification Mgr.
LSI Logic Corp.
Plano TX. 75074
This archive was generated by hypermail 2b28 : Fri Mar 22 2002 - 13:34:43 PST