Subject: RE: Time to Start Up Again!
From: Dave Kelf (davek@co-design.com)
Date: Fri Mar 01 2002 - 10:16:11 PST
Hi Vassilios
To answer your question on how it fits with the rest of SystemVerilog (I
see Harry addressed your other question), yes this spec is designed to be
completely compatible with the rest of SystemVerilog and we have already
proven much of this in Systemsim. It can also be used in scenarios where
the rest of the code is just Verilog, and even in situations where other
testbench formats or C is being used for part of the design/testbench
database. We see this as very important of course.
Cheers
Dave
At 05:44 PM 3/1/2002 +0100, Vassilios.Gerousis@Infineon.Com wrote:
>Hello Tom,
> Please work with David Lacey, the current chairman of assertion
> committee, to arrange meeting with the assertion committee. We will have
> a detailed discussion on March 14 at Mentor Graphics as a face to face
> meeting with the Verilog++ committee. During this we will invite all
> assertion members to attend this meeting to help us synchronize on the
> final delivery for May 1. We will also review in detail the DAS proposal.
>
> Two things that I see missing today:
>
>1- How does DAS fit with other constructs defined in SystemVerilog? Can it
>be used anywhere?
>
>2- OVL and DAS synchronization: How does DAS implement the 35 functions
>defined in OVL?
>
>Vassilios
>
>-----Original Message-----
>From: Tom Fitzpatrick [mailto:fitz@co-design.com]
>Sent: Friday, March 01, 2002 5:25 PM
>To: assertion@eda.org
>Cc: Dave Kelf; Simon Davidmann
>Subject: Time to Start Up Again!
>
>
>Hi All,
>
>The SUPERLOG Design Assertion Subset donation is finally complete. As such,
>I'd like to schedule a series of committee meetings so that we can make up
>for lost time.
>
>I know that our course previously had been to have meetings on Thursdays,
>but that won't work for the next two weeks. Next week, I'd like to propose
>we meet at 9:00am PST/12pm EST on Friday, 3/8. This is to accomodate Peter
>Flake's DATE travel schedule. The agenda for this meeting is to go through
>the donated spec (to be distributed early next week) and make sure that
>everyone is up to speed on what's in it and why. Peter is essential to this
>discussion.
>
>I'd like to have the next meeting after that in person in San Jose the week
>of HDLCon. Wednesday that week works best for us. Can someone can provide a
>meeting room at their local office? This meeting will be to build a list of
>issues that everyone has from the initial review. I'd like to prioritize the
>sections of the spec, and put together a timeline to get all issues resolved
>in time to meet the SystemVerilog schedule.
>
>At Friday's meeting, we can also discuss future meetings, but I'd like to
>aim for weekly meetings at least through March.
>
>Thanks for your patience, cooperation and effort.
>-Tom
>
>
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