Subject: RE: Follow-up from meeting
From: Shalom.Bresticker@motorola.com
Date: Mon Dec 10 2001 - 22:40:34 PST
As a user of CBV within Motorola, I will second Tom's comments.
I'm not bad-mouthing CBV. I think at least some, maybe all, of the other formal
languages being considered by the VFV group are harder to learn, read, and write
than CBV.
But if I would have a choice of using assertions, I would definitely prefer
that, where possible.
Shalom Bresticker
On Mon, 10 Dec 2001, Tom Anderson wrote:
> Date: Mon, 10 Dec 2001 13:36:23 -0800 (PST)
> From: Tom Anderson <tla@0-in.com>
> To: Vassilios.Gerousis@Infineon.Com, assertion@eda.org, fitz@co-design.com,
sdart@ForteDS.com, tla@0-in.com
> Subject: RE: Follow-up from meeting
>
> > It is important not to be seduced by the overlap.
>
> No seduction intended; I used the phrase "one possible future vision"
> to mean just that. I'm not sure if this is the right vision, or even
> whether it's possible to achieve. I do know that there are designers
> who would not voluntarily use any of the four formal languages under
> consideration by the formal verification technical committee. One of
> our goals in this committee should be to satisfy their assertion needs
> without adding a lot of complexity to System Verilog. I'm afraid that
> that if we try to capture every possible assertion type or temporal
> relationship with new constructs we're going to end up with something
> that looks more like the existing formal languages than Verilog.
>
-- Shalom Bresticker Shalom.Bresticker@motorola.com Principal Staff Engineer Tel: +972 9 9522268 Motorola Semiconductor Israel, Ltd. Fax: +972 9 9522890 POB 2208, Herzlia 46120, ISRAEL Cell: +972 50 441478
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