OVL/Assertion committee mtg Wednesday


Subject: OVL/Assertion committee mtg Wednesday
From: John Emmitt (johne@verplex.com)
Date: Mon Sep 24 2001 - 14:16:39 PDT


The next mtg of the OVL/Assertion committee is this Wed. 9/26/01 at 9am
PDT. Those of you in the Bay area can attend in person at the Verplex office
in Milpitas.

Conference call information is as follows:

Domestic Dial-In #: 888-621-9536
Intl Dial-In #: 212-364-2900
Room #: *8377539*

Mtg Agenda:
-------------
The mtg has been split into two parts, the first part involves discussion
related to the Accellera Assertion language extensions. The second part of
the mtg covers the OVL library maintenance and extensions.

1. Assertions
    - Review revised Rqrmnts doc.; specifically- review new usage model
section
      (Harry Foster to distribute)
    - make plan/schedule to finalize the doc. for submission to the HDL+
committee

2. OVL
    - status of provisional release
    - propositional assertions
    - new candidate assertions

General
    - elect new OVL/Assertion Committee co-chair to replace Harry Foster,
who is stepping down

Regards,

John Emmitt
OVL/Assertion Committee Co-Chair

--------------------------
In the OVL1.2 Provisional library, there are 6 new assertions and
some new header files.

assert_always_on_edge
continuously monitors a test_expr at every specified edge of the
sampling event and positive edge of the clock. It ensures that a
specified Verilog expression will always evaluate TRUE on the
edge of a sampling event.

assert_count
Ensures that a counter will increment within a min/max specified
range, and that the counter will decrement within a different
min/max specified range.

assert_cycle_sequence
Ensures that a sequence of events occurs in the order specified.
(cycle bounded by the number of events specified)

assert_next
Ensures that a specified event occurs after a specified number of
clock cycles. In logical terms, where X denotes the next cycle
operator, "start_event => X^n (test_expr)"

assert_order_sequence
Verify an arbitrary sequence of events (unbounded)

assert_width
Continuously monitors a test_expr. When the test_expr evaluates
TRUE, the assertion ensures that the test_expr remains TRUE
for a specified minimum number of clock cycles and does not exceed
a maximum number of clock cycles.

assert_header and assert_task are new library header files.



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