Verilog++ Assertion Committee Slides

Subject: Verilog++ Assertion Committee Slides
From: Harry Foster (foster@rsn.hp.com)
Date: Thu Aug 16 2001 - 10:25:20 PDT

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Hello Committee Members,
 
Attached are a quick set of slides I put together
for our August 17 meeting. This set of slides
reviews the strawman requirements proposal I sent
out earlier this week.

Best regards,

-Harry

• application/vnd.ms-powerpoint attachment: VerilogAssertions.ppt

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